[U-Boot] [PATCH v6 04/16] tegra: fdt: Add LCD definitions for Tegra

[U-Boot] [PATCH v6 04/16] tegra: fdt: Add LCD definitions for Tegra

[Simon Glass]

Add LCD definitions and also a proposed binding for LCD displays.

The PWM is as per what will likely be committed to linux-next soon.

The displaymode binding comes from a proposal here:

http://lists.freedesktop.org/archives/dri-devel/2012-July/024875.html

The panel binding is new, and fills a need to specify the panel
timings and other tegra-specific information. Should a binding appear
that allows the pwm to handle this automatically, we can revisit
this.

Signed-off-by: Simon Glass <sjg@chromium.org>
---
Changes in v6:
- Add an additional delay before enabling the panel

Changes in v5:
- Make all Tegra LCD fdt nodes disabled by default

Changes in v4:
- Moved panel information into panel node (was in rgb node)
- Remove LCD frame buffer address property hack

Changes in v3:
- Use displaymode binding for fdt
- Bring in proposed tegra display controller binding
- Add new panel binding to fit with tegra display controller binding

Changes in v2:
- Add nvidia prefix to device tree properties

 arch/arm/dts/tegra20.dtsi                      |   98 ++++++++++++++++++++++++
 doc/device-tree-bindings/video/displaymode.txt |   42 ++++++++++
 doc/device-tree-bindings/video/tegra20-dc.txt  |   85 ++++++++++++++++++++
 3 files changed, 225 insertions(+), 0 deletions(-)
 create mode 100644 doc/device-tree-bindings/video/displaymode.txt
 create mode 100644 doc/device-tree-bindings/video/tegra20-dc.txt

diff --git a/arch/arm/dts/tegra20.dtsi b/arch/arm/dts/tegra20.dtsi
index 3221bc9..636ec2c 100644
--- a/arch/arm/dts/tegra20.dtsi
+++ b/arch/arm/dts/tegra20.dtsi
@@ -218,4 +218,102 @@
 		#pwm-cells = <2>;
 	};
 
+	host1x {
+		compatible = "nvidia,tegra20-host1x", "simple-bus";
+		reg = <0x50000000 0x00024000>;
+		interrupts = <0 65 0x04   /* mpcore syncpt */
+			      0 67 0x04>; /* mpcore general */
+		status = "disabled";
+
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		ranges = <0x54000000 0x54000000 0x04000000>;
+
+		/* video-encoding/decoding */
+		mpe {
+			reg = <0x54040000 0x00040000>;
+			interrupts = <0 68 0x04>;
+			status = "disabled";
+		};
+
+		/* video input */
+		vi {
+			reg = <0x54080000 0x00040000>;
+			interrupts = <0 69 0x04>;
+			status = "disabled";
+		};
+
+		/* EPP */
+		epp {
+			reg = <0x540c0000 0x00040000>;
+			interrupts = <0 70 0x04>;
+			status = "disabled";
+		};
+
+		/* ISP */
+		isp {
+			reg = <0x54100000 0x00040000>;
+			interrupts = <0 71 0x04>;
+			status = "disabled";
+		};
+
+		/* 2D engine */
+		gr2d {
+			reg = <0x54140000 0x00040000>;
+			interrupts = <0 72 0x04>;
+			status = "disabled";
+		};
+
+		/* 3D engine */
+		gr3d {
+			reg = <0x54180000 0x00040000>;
+			status = "disabled";
+		};
+
+		/* display controllers */
+		dc at 54200000 {
+			compatible = "nvidia,tegra20-dc";
+			reg = <0x54200000 0x00040000>;
+			interrupts = <0 73 0x04>;
+			status = "disabled";
+
+			rgb {
+				status = "disabled";
+			};
+		};
+
+		dc at 54240000 {
+			compatible = "nvidia,tegra20-dc";
+			reg = <0x54240000 0x00040000>;
+			interrupts = <0 74 0x04>;
+			status = "disabled";
+
+			rgb {
+				status = "disabled";
+			};
+		};
+
+		/* outputs */
+		hdmi {
+			compatible = "nvidia,tegra20-hdmi";
+			reg = <0x54280000 0x00040000>;
+			interrupts = <0 75 0x04>;
+			status = "disabled";
+		};
+
+		tvo {
+			compatible = "nvidia,tegra20-tvo";
+			reg = <0x542c0000 0x00040000>;
+			interrupts = <0 76 0x04>;
+			status = "disabled";
+		};
+
+		dsi {
+			compatible = "nvidia,tegra20-dsi";
+			reg = <0x54300000 0x00040000>;
+			status = "disabled";
+		};
+	};
+
 };
diff --git a/doc/device-tree-bindings/video/displaymode.txt b/doc/device-tree-bindings/video/displaymode.txt
new file mode 100644
index 0000000..45ca42d
--- /dev/null
+++ b/doc/device-tree-bindings/video/displaymode.txt
@@ -0,0 +1,42 @@
+videomode bindings
+==================
+
+(from http://lists.freedesktop.org/archives/dri-devel/2012-July/024875.html)
+
+Required properties:
+ - xres, yres: Display resolution
+ - left-margin, right-margin, hsync-len: Horizontal Display timing
+   parameters in pixels
+ - upper-margin, lower-margin, vsync-len: Vertical display timing
+   parameters in lines
+ - clock: display clock in Hz
+
+Optional properties:
+ - width-mm, height-mm: Display dimensions in mm
+ - hsync-active-high (bool): Hsync pulse is active high
+ - vsync-active-high (bool): Vsync pulse is active high
+ - interlaced (bool): This is an interlaced mode
+ - doublescan (bool): This is a doublescan mode
+
+There are different ways of describing a display mode. The devicetree
+representation corresponds to the one used by the Linux Framebuffer
+framework described here in Documentation/fb/framebuffer.txt. This
+representation has been chosen because it's the only format which does
+not allow for inconsistent parameters. Unlike the Framebuffer framework
+the devicetree has the clock in Hz instead of ps.
+
+Example:
+
+	display at 0 {
+		/* 1920x1080p24 */
+		clock = <52000000>;
+		xres = <1920>;
+		yres = <1080>;
+		left-margin = <25>;
+		right-margin = <25>;
+		hsync-len = <25>;
+		lower-margin = <2>;
+		upper-margin = <2>;
+		vsync-len = <2>;
+		hsync-active-high;
+	};
diff --git a/doc/device-tree-bindings/video/tegra20-dc.txt b/doc/device-tree-bindings/video/tegra20-dc.txt
new file mode 100644
index 0000000..4731c3f
--- /dev/null
+++ b/doc/device-tree-bindings/video/tegra20-dc.txt
@@ -0,0 +1,85 @@
+Display Controller
+------------------
+
+(there isn't yet a generic binding in Linux, so this describes what is in
+U-Boot, and may change based on Linux activity)
+
+The device node for a display device is as described in the document
+"Open Firmware Recommended Practice : Universal Serial Bus" with the
+following modifications and additions :
+
+Required properties :
+ - compatible : Should be "nvidia,tegra20-dc"
+
+Required subnode 'rgb' is as follows:
+
+Required properties (rgb) :
+ - nvidia,panel : phandle of LCD panel information
+
+
+The panel node describes the panel itself. This has the properties listed in
+displaymode.txt as well as:
+
+Required properties (panel) :
+ - nvidia,bits-per-pixel: number of bits per pixel (depth)
+ - nvidia,pwm : pwm to use to set display contrast (see tegra20-pwm.txt)
+ - nvidia,panel-timings: 4 cells containing required timings in ms:
+	* delay before asserting panel_vdd
+	* delay between panel_vdd-rise and data-rise
+	* delay between data-rise and backlight_vdd-rise
+	* delay between backlight_vdd and pwm-rise
+	* delay between pwm-rise and backlight_en-rise
+
+Optional GPIO properies all have (phandle, GPIO number, flags):
+ - nvidia,backlight-enable-gpios: backlight enable GPIO
+ - nvidia,lvds-shutdown-gpios: LVDS power shutdown GPIO
+ - nvidia,backlight-vdd-gpios: backlight power GPIO
+ - nvidia,panel-vdd-gpios: panel power GPIO
+
+Example:
+
+host1x {
+	compatible = "nvidia,tegra20-host1x", "simple-bus";
+	reg = <0x50000000 0x00024000>;
+	interrupts = <0 65 0x04   /* mpcore syncpt */
+			0 67 0x04>; /* mpcore general */
+
+	#address-cells = <1>;
+	#size-cells = <1>;
+	status = "okay";
+
+	ranges = <0x54000000 0x54000000 0x04000000>;
+
+	dc at 54200000 {
+		compatible = "nvidia,tegra20-dc";
+		reg = <0x54200000 0x00040000>;
+		interrupts = <0 73 0x04>;
+		status = "okay";
+
+		rgb {
+			status = "okay";
+			nvidia,panel = <&lcd_panel>;
+		};
+	};
+};
+
+lcd_panel: panel {
+	/* Seaboard has 1366x768 */
+	clock = <70600000>;
+	xres = <1366>;
+	yres = <768>;
+	left-margin = <58>;
+	right-margin = <58>;
+	hsync-len = <58>;
+	lower-margin = <4>;
+	upper-margin = <4>;
+	vsync-len = <4>;
+	hsync-active-high;
+	nvidia,bits-per-pixel = <16>;
+	nvidia,pwm = <&pwm 2 0>;
+	nvidia,backlight-enable-gpios = <&gpio 28 0>;	/* PD4 */
+	nvidia,lvds-shutdown-gpios = <&gpio 10 0>;	/* PB2 */
+	nvidia,backlight-vdd-gpios = <&gpio 176 0>;	/* PW0 */
+	nvidia,panel-vdd-gpios = <&gpio 22 0>;		/* PC6 */
+	nvidia,panel-timings = <400 4 203 17 15>;
+};
-- 
1.7.7.3

[U-Boot] [PATCH v6 07/16] tegra: Add LCD driver

[Simon Glass]

This driver supports driving a single LCD and providing a U-Boot console
on it.

Signed-off-by: Simon Glass <sjg@chromium.org>
---
Changes in v6:
- Add an additional delay before enabling the panel
- Don't access beyond end of config.panel_timings[]
- Set LCD frame buffer to correct address

Changes in v4:
- Rebase on top of new tegra common directory structure
- Change LCD panel GPIOs to be entirely optional
- Only indicate that LCD init is complete when all stages complete

Changes in v3:
- Move some fdt decode code from LCD driver to SOC display driver
- Rename fdt config structures
- Use new pwm binding from pre-linux-next
- Adjust LCD driver to use new SOC display driver structures

Changes in v2:
- Update LCD driver to deal with new fdt bindings

 drivers/video/Makefile |    1 +
 drivers/video/tegra.c  |  368 ++++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 369 insertions(+), 0 deletions(-)
 create mode 100644 drivers/video/tegra.c

diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index ebb6da8..78a7668 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -49,6 +49,7 @@ COBJS-$(CONFIG_VIDEO_OMAP3) += omap3_dss.o
 COBJS-$(CONFIG_VIDEO_SED13806) += sed13806.o
 COBJS-$(CONFIG_VIDEO_SM501) += sm501.o
 COBJS-$(CONFIG_VIDEO_SMI_LYNXEM) += smiLynxEM.o videomodes.o
+COBJS-$(CONFIG_VIDEO_TEGRA) += tegra.o
 COBJS-$(CONFIG_VIDEO_VCXK) += bus_vcxk.o
 
 COBJS	:= $(sort $(COBJS-y))
diff --git a/drivers/video/tegra.c b/drivers/video/tegra.c
new file mode 100644
index 0000000..6a4c088
--- /dev/null
+++ b/drivers/video/tegra.c
@@ -0,0 +1,368 @@
+/*
+ * Copyright (c) 2011 The Chromium OS Authors.
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <fdtdec.h>
+#include <lcd.h>
+
+#include <asm/system.h>
+#include <asm/gpio.h>
+
+#include <asm/arch/clock.h>
+#include <asm/arch/funcmux.h>
+#include <asm/arch/pinmux.h>
+#include <asm/arch/pwm.h>
+#include <asm/arch/display.h>
+#include <asm/arch-tegra/timer.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* These are the stages we go throuh in enabling the LCD */
+enum stage_t {
+	STAGE_START,
+	STAGE_PANEL_VDD,
+	STAGE_LVDS,
+	STAGE_BACKLIGHT_VDD,
+	STAGE_PWM,
+	STAGE_BACKLIGHT_EN,
+	STAGE_DONE,
+};
+
+static enum stage_t stage;	/* Current stage we are at */
+static unsigned long timer_next; /* Time we can move onto next stage */
+
+/* Our LCD config, set up in handle_stage() */
+static struct fdt_panel_config config;
+struct fdt_disp_config *disp_config;	/* Display controller config */
+
+enum {
+	/* Maximum LCD size we support */
+	LCD_MAX_WIDTH		= 1366,
+	LCD_MAX_HEIGHT		= 768,
+	LCD_MAX_LOG2_BPP	= 4,		/* 2^4 = 16 bpp */
+};
+
+int lcd_line_length;
+int lcd_color_fg;
+int lcd_color_bg;
+
+void *lcd_base;			/* Start of framebuffer memory	*/
+void *lcd_console_address;	/* Start of console buffer	*/
+
+short console_col;
+short console_row;
+
+vidinfo_t panel_info = {
+	/* Insert a value here so that we don't end up in the BSS */
+	.vl_col = -1,
+};
+
+char lcd_cursor_enabled;
+
+ushort lcd_cursor_width;
+ushort lcd_cursor_height;
+
+#ifndef CONFIG_OF_CONTROL
+#error "You must enable CONFIG_OF_CONTROL to get Tegra LCD support"
+#endif
+
+void lcd_cursor_size(ushort width, ushort height)
+{
+	lcd_cursor_width = width;
+	lcd_cursor_height = height;
+}
+
+void lcd_toggle_cursor(void)
+{
+	ushort x, y;
+	uchar *dest;
+	ushort row;
+
+	x = console_col * lcd_cursor_width;
+	y = console_row * lcd_cursor_height;
+	dest = (uchar *)(lcd_base + y * lcd_line_length + x * (1 << LCD_BPP) /
+			8);
+
+	for (row = 0; row < lcd_cursor_height; ++row, dest += lcd_line_length) {
+		ushort *d = (ushort *)dest;
+		ushort color;
+		int i;
+
+		for (i = 0; i < lcd_cursor_width; ++i) {
+			color = *d;
+			color ^= lcd_color_fg;
+			*d = color;
+			++d;
+		}
+	}
+}
+
+void lcd_cursor_on(void)
+{
+	lcd_cursor_enabled = 1;
+	lcd_toggle_cursor();
+}
+void lcd_cursor_off(void)
+{
+	lcd_cursor_enabled = 0;
+	lcd_toggle_cursor();
+}
+
+char lcd_is_cursor_enabled(void)
+{
+	return lcd_cursor_enabled;
+}
+
+static void update_panel_size(struct fdt_disp_config *config)
+{
+	panel_info.vl_col = config->width;
+	panel_info.vl_row = config->height;
+	panel_info.vl_bpix = config->log2_bpp;
+}
+
+/*
+ *  Main init function called by lcd driver.
+ *  Inits and then prints test pattern if required.
+ */
+
+void lcd_ctrl_init(void *lcdbase)
+{
+	int line_length, size;
+
+	assert(disp_config);
+
+	lcd_base = (void *)disp_config->frame_buffer;
+
+	/* Make sure that we can acommodate the selected LCD */
+	assert(disp_config->width <= LCD_MAX_WIDTH);
+	assert(disp_config->height <= LCD_MAX_HEIGHT);
+	assert(disp_config->log2_bpp <= LCD_MAX_LOG2_BPP);
+	if (disp_config->width <= LCD_MAX_WIDTH
+			&& disp_config->height <= LCD_MAX_HEIGHT
+			&& disp_config->log2_bpp <= LCD_MAX_LOG2_BPP)
+		update_panel_size(disp_config);
+	size = lcd_get_size(&line_length);
+
+	debug("LCD frame buffer@%p\n", lcd_base);
+}
+
+ulong calc_fbsize(void)
+{
+	return (panel_info.vl_col * panel_info.vl_row *
+		NBITS(panel_info.vl_bpix)) / 8;
+}
+
+void lcd_setcolreg(ushort regno, ushort red, ushort green, ushort blue)
+{
+}
+
+void tegra_lcd_early_init(const void *blob)
+{
+	/*
+	 * Go with the maximum size for now. We will fix this up after
+	 * relocation. These values are only used for memory alocation.
+	 */
+	panel_info.vl_col = LCD_MAX_WIDTH;
+	panel_info.vl_row = LCD_MAX_HEIGHT;
+	panel_info.vl_bpix = LCD_MAX_LOG2_BPP;
+}
+
+/**
+ * Decode the panel information from the fdt.
+ *
+ * @param blob		fdt blob
+ * @param config	structure to store fdt config into
+ * @return 0 if ok, -ve on error
+ */
+static int fdt_decode_lcd(const void *blob, struct fdt_panel_config *config)
+{
+	int display_node;
+
+	disp_config = tegra_display_get_config();
+	if (!disp_config) {
+		debug("%s: Display controller is not configured\n", __func__);
+		return -1;
+	}
+	display_node = disp_config->panel_node;
+	if (display_node < 0) {
+		debug("%s: No panel configuration available\n", __func__);
+		return -1;
+	}
+
+	config->pwm_channel = pwm_request(blob, display_node, "nvidia,pwm");
+	if (config->pwm_channel < 0) {
+		debug("%s: Unable to request PWM channel\n", __func__);
+		return -1;
+	}
+
+	config->cache_type = fdtdec_get_int(blob, display_node,
+					    "nvidia,cache-type",
+					    FDT_LCD_CACHE_WRITE_BACK_FLUSH);
+
+	/* These GPIOs are all optional */
+	fdtdec_decode_gpio(blob, display_node, "nvidia,backlight-enable-gpios",
+			    &config->backlight_en);
+	fdtdec_decode_gpio(blob, display_node, "nvidia,lvds-shutdown-gpios",
+			   &config->lvds_shutdown);
+	fdtdec_decode_gpio(blob, display_node, "nvidia,backlight-vdd-gpios",
+			   &config->backlight_vdd);
+	fdtdec_decode_gpio(blob, display_node, "nvidia,panel-vdd-gpios",
+			   &config->panel_vdd);
+
+	return fdtdec_get_int_array(blob, display_node, "nvidia,panel-timings",
+			config->panel_timings, FDT_LCD_TIMINGS);
+}
+
+/**
+ * Handle the next stage of device init
+ */
+static int handle_stage(const void *blob)
+{
+	debug("%s: stage %d\n", __func__, stage);
+
+	/* do the things for this stage */
+	switch (stage) {
+	case STAGE_START:
+		/* Initialize the Tegra display controller */
+		if (tegra_display_probe(gd->fdt_blob, gd->fb_base)) {
+			printf("%s: Failed to probe display driver\n",
+			__func__);
+			return -1;
+		}
+
+		/* get panel details */
+		if (fdt_decode_lcd(blob, &config)) {
+			printf("No valid LCD information in device tree\n");
+			return -1;
+		}
+
+		/*
+		 * It is possible that the FDT has requested that the LCD be
+		 * disabled. We currently don't support this. It would require
+		 * changes to U-Boot LCD subsystem to have LCD support
+		 * compiled in but not used. An easier option might be to
+		 * still have a frame buffer, but leave the backlight off and
+		 * remove all mention of lcd in the stdout environment
+		 * variable.
+		 */
+
+		funcmux_select(PERIPH_ID_DISP1, FUNCMUX_DEFAULT);
+
+		fdtdec_setup_gpio(&config.panel_vdd);
+		fdtdec_setup_gpio(&config.lvds_shutdown);
+		fdtdec_setup_gpio(&config.backlight_vdd);
+		fdtdec_setup_gpio(&config.backlight_en);
+
+		/*
+		 * TODO: If fdt includes output flag we can omit this code
+		 * since fdtdec_setup_gpio will do it for us.
+		 */
+		if (fdt_gpio_isvalid(&config.panel_vdd))
+			gpio_direction_output(config.panel_vdd.gpio, 0);
+		if (fdt_gpio_isvalid(&config.lvds_shutdown))
+			gpio_direction_output(config.lvds_shutdown.gpio, 0);
+		if (fdt_gpio_isvalid(&config.backlight_vdd))
+			gpio_direction_output(config.backlight_vdd.gpio, 0);
+		if (fdt_gpio_isvalid(&config.backlight_en))
+			gpio_direction_output(config.backlight_en.gpio, 0);
+		break;
+	case STAGE_PANEL_VDD:
+		if (fdt_gpio_isvalid(&config.panel_vdd))
+			gpio_direction_output(config.panel_vdd.gpio, 1);
+		break;
+	case STAGE_LVDS:
+		if (fdt_gpio_isvalid(&config.lvds_shutdown))
+			gpio_set_value(config.lvds_shutdown.gpio, 1);
+		break;
+	case STAGE_BACKLIGHT_VDD:
+		if (fdt_gpio_isvalid(&config.backlight_vdd))
+			gpio_set_value(config.backlight_vdd.gpio, 1);
+		break;
+	case STAGE_PWM:
+		/* Enable PWM at 15/16 high, 32768 Hz with divider 1 */
+		pinmux_set_func(PINGRP_GPU, PMUX_FUNC_PWM);
+		pinmux_tristate_disable(PINGRP_GPU);
+
+		pwm_enable(config.pwm_channel, 32768, 0xdf, 1);
+		break;
+	case STAGE_BACKLIGHT_EN:
+		if (fdt_gpio_isvalid(&config.backlight_en))
+			gpio_set_value(config.backlight_en.gpio, 1);
+		break;
+	case STAGE_DONE:
+		break;
+	}
+
+	/* set up timer for next stage */
+	timer_next = timer_get_us();
+	if (stage < FDT_LCD_TIMINGS)
+		timer_next += config.panel_timings[stage] * 1000;
+
+	/* move to next stage */
+	stage++;
+	return 0;
+}
+
+int tegra_lcd_check_next_stage(const void *blob, int wait)
+{
+	if (stage == STAGE_DONE)
+		return 0;
+
+	do {
+		/* wait if we need to */
+		debug("%s: stage %d\n", __func__, stage);
+		if (stage != STAGE_START) {
+			int delay = timer_next - timer_get_us();
+
+			if (delay > 0) {
+				if (wait)
+					udelay(delay);
+				else
+					return 0;
+			}
+		}
+
+		if (handle_stage(blob))
+			return -1;
+	} while (wait && stage != STAGE_DONE);
+	if (stage == STAGE_DONE)
+		debug("%s: LCD init complete\n", __func__);
+
+	return 0;
+}
+
+void lcd_enable(void)
+{
+	/*
+	 * Backlight and power init will be done separately in
+	 * tegra_lcd_check_next_stage(), which should be called in
+	 * board_late_init().
+	 *
+	 * U-Boot code supports only colour depth, selected at compile time.
+	 * The device tree setting should match this. Otherwise the display
+	 * will not look right, and U-Boot may crash.
+	 */
+	if (disp_config->log2_bpp != LCD_BPP) {
+		printf("%s: Error: LCD depth configured in FDT (%d = %dbpp)"
+			" must match setting of LCD_BPP (%d)\n", __func__,
+		       disp_config->log2_bpp, disp_config->bpp, LCD_BPP);
+	}
+}
-- 
1.7.7.3

[U-Boot] [PATCH v6 14/16] tegra: fdt: Add LCD definitions for Seaboard

[Simon Glass]

The Seaboard has a 1366x768 16bpp LCD. The backlight is controlled
by one of the PWMs.

Signed-off-by: Simon Glass <sjg@chromium.org>
---
Changes in v6:
- Add 400ms delay before enabling panel VDD

Changes in v5:
- Enable required LCD fdt nodes (which are now disabled by default)

Changes in v4:
- Adjust LCD fdt nodes for new binding
- Remove LCD frame buffer address property hack

Changes in v3:
- Use new upstream proposed LCD definitions

Changes in v2:
- Update seaboard LCD definitions for new fdt binding

 board/nvidia/dts/tegra20-seaboard.dts |   33 +++++++++++++++++++++++++++++++++
 1 files changed, 33 insertions(+), 0 deletions(-)

diff --git a/board/nvidia/dts/tegra20-seaboard.dts b/board/nvidia/dts/tegra20-seaboard.dts
index 25a63a0..dd98ca4 100644
--- a/board/nvidia/dts/tegra20-seaboard.dts
+++ b/board/nvidia/dts/tegra20-seaboard.dts
@@ -163,4 +163,37 @@
 			compatible = "hynix,hy27uf4g2b", "nand-flash";
 		};
 	};
+
+	host1x {
+		status = "okay";
+		dc at 54200000 {
+			status = "okay";
+			rgb {
+				status = "okay";
+				nvidia,panel = <&lcd_panel>;
+			};
+		};
+	};
+
+	lcd_panel: panel {
+		/* Seaboard has 1366x768 */
+		clock = <70600000>;
+		xres = <1366>;
+		yres = <768>;
+		left-margin = <58>;
+		right-margin = <58>;
+		hsync-len = <58>;
+		lower-margin = <4>;
+		upper-margin = <4>;
+		vsync-len = <4>;
+		hsync-active-high;
+		nvidia,bits-per-pixel = <16>;
+		nvidia,pwm = <&pwm 2 0>;
+		nvidia,backlight-enable-gpios = <&gpio 28 0>;	/* PD4 */
+		nvidia,lvds-shutdown-gpios = <&gpio 10 0>;	/* PB2 */
+		nvidia,backlight-vdd-gpios = <&gpio 176 0>;	/* PW0 */
+		nvidia,panel-vdd-gpios = <&gpio 22 0>;		/* PC6 */
+		nvidia,panel-timings = <400 4 203 17 15>;
+	};
+
 };
-- 
1.7.7.3

[U-Boot] [PATCH v6 14/16] tegra: fdt: Add LCD definitions for Seaboard

[Stephen Warren]

On 10/08/2012 04:28 PM, Simon Glass wrote:
> The Seaboard has a 1366x768 16bpp LCD. The backlight is controlled
> by one of the PWMs.

These 3 updated patches seem OK, but I'd like to see Thierry's ack for
the DT binding changes; they'd need to be ported into the kernel I think.