From mboxrd@z Thu Jan 1 00:00:00 1970 From: Vikram Narayanan Date: Fri, 26 Oct 2012 17:03:36 +0530 Subject: [U-Boot] [PATCH 1/2] mmc: add bcm2835 driver In-Reply-To: <1351054248-5604-1-git-send-email-swarren@wwwdotorg.org> References: <1351054248-5604-1-git-send-email-swarren@wwwdotorg.org> Message-ID: <508A7510.4040106@gmail.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Some nitpicks. On 10/24/2012 10:20 AM, Stephen Warren wrote: > This adds a simple driver for the BCM2835's SD controller. > > Workarounds are implemented for: > * Register writes can't be too close to each-other in time, or they will > be lost. > * Register accesses must all be 32-bit, so implement custom accessors. > > This code was extracted from: > git://github.com/gonzoua/u-boot-pi.git master > which was created by Oleksandr Tymoshenko. > > Portions of the code there were obviously based on the Linux kernel at: > git://github.com/raspberrypi/linux.git rpi-3.2.27 > > No s-o-b tags were present in either location. > > swarren changed the following for upstream: > * Removed hack udelay()s in bcm2835_sdhci_raw_writel(); setting > SDHCI_QUIRK_WAIT_SEND_CMD appears to solve the issues. > * Remove register logging from read*/write* functions. > * Sort out confusion with min/max_freq values passed to add_sdhci(). > * Simplified and commented twoticks_delay calculation. > * checkpatch fixes. > > Cc: Oleksandr Tymoshenko > Signed-off-by: Stephen Warren > --- > This series is based on the previous bcm2835 patches I sent, to add the > mbox and video drivers. Patch 1 should be independant, but patch 2 depends > on those other patches. > > arch/arm/include/asm/arch-bcm2835/sdhci.h | 24 ++++ > drivers/mmc/Makefile | 1 + > drivers/mmc/bcm2835_sdhci.c | 172 +++++++++++++++++++++++++++++ > 3 files changed, 197 insertions(+) > create mode 100644 arch/arm/include/asm/arch-bcm2835/sdhci.h > create mode 100644 drivers/mmc/bcm2835_sdhci.c > > diff --git a/arch/arm/include/asm/arch-bcm2835/sdhci.h b/arch/arm/include/asm/arch-bcm2835/sdhci.h > new file mode 100644 > index 0000000..a4f867b > --- /dev/null > +++ b/arch/arm/include/asm/arch-bcm2835/sdhci.h > @@ -0,0 +1,24 @@ > +/* > + * (C) Copyright 2012 Stephen Warren > + * > + * See file CREDITS for list of people who contributed to this > + * project. > + * > + * This program is free software; you can redistribute it and/or > + * modify it under the terms of the GNU General Public License > + * version 2 as published by the Free Software Foundation. > + * > + * This program is distributed in the hope that it will be useful, but > + * WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + */ > + > +#ifndef _BCM2835_SDHCI_H_ > +#define _BCM2835_SDHCI_H_ > + > +#define BCM2835_SDHCI_BASE 0x20300000 > + > +int bcm2835_sdhci_init(u32 regbase, u32 emmc_freq); > + > +#endif > diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile > index a1dd730..6be36f2 100644 > --- a/drivers/mmc/Makefile > +++ b/drivers/mmc/Makefile > @@ -43,6 +43,7 @@ COBJS-$(CONFIG_MXS_MMC) += mxsmmc.o > COBJS-$(CONFIG_OMAP_HSMMC) += omap_hsmmc.o > COBJS-$(CONFIG_PXA_MMC_GENERIC) += pxa_mmc_gen.o > COBJS-$(CONFIG_SDHCI) += sdhci.o > +COBJS-$(CONFIG_BCM2835_SDHCI) += bcm2835_sdhci.o > COBJS-$(CONFIG_S5P_SDHCI) += s5p_sdhci.o > COBJS-$(CONFIG_SH_MMCIF) += sh_mmcif.o > COBJS-$(CONFIG_TEGRA_MMC) += tegra_mmc.o > diff --git a/drivers/mmc/bcm2835_sdhci.c b/drivers/mmc/bcm2835_sdhci.c > new file mode 100644 > index 0000000..1d623c0 > --- /dev/null > +++ b/drivers/mmc/bcm2835_sdhci.c > @@ -0,0 +1,172 @@ > +/* > + * This code was extracted from: > + * git://github.com/gonzoua/u-boot-pi.git master > + * and hence presumably (C) 2012 Oleksandr Tymoshenko > + * > + * Tweaks for U-Boot upstreaming > + * (C) 2012 Stephen Warren > + * > + * Portions (e.g. read/write macros, concepts for back-to-back register write > + * timing workarounds) obviously extracted from the Linux kernel at: > + * https://github.com/raspberrypi/linux.git rpi-3.2.27 > + * > + * The Linux kernel code has the following (c) and license, which is hence > + * propagated to Oleksandr's tree and here: > + * > + * Support for SDHCI device on 2835 > + * Based on sdhci-bcm2708.c (c) 2010 Broadcom > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License version 2 as > + * published by the Free Software Foundation. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + * > + * You should have received a copy of the GNU General Public License > + * along with this program; if not, write to the Free Software > + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. > + */ > + > +/* Supports: > + * SDHCI platform device - Arasan SD controller in BCM2708 > + * > + * Inspired by sdhci-pci.c, by Pierre Ossman > + */ > + > +#include > +#include > +#include > + > +/* 400KHz is max freq for card ID etc. Use that as min */ > +#define MIN_FREQ 400000 > + > +static uint twoticks_delay; > + > +static inline void bcm2835_sdhci_raw_writel(struct sdhci_host *host, u32 val, > + int reg) > +{ > + static ulong last_write; > + > + /* > + * The Arasan has a bugette whereby it may lose the content of > + * successive writes to registers that are within two SD-card clock > + * cycles of each other (a clock domain crossing problem). > + * It seems, however, that the data register does not have this problem. > + * (Which is just as well - otherwise we'd have to nobble the DMA engine > + * too) > + */ > + while (get_timer(last_write)< twoticks_delay) > + ; > + > + writel(val, host->ioaddr + reg); > + last_write = get_timer(0); > +} > + > +static inline u32 bcm2835_sdhci_raw_readl(struct sdhci_host *host, int reg) > +{ > + return readl(host->ioaddr + reg); > +} > + > +static void bcm2835_sdhci_writel(struct sdhci_host *host, u32 val, int reg) > +{ > + bcm2835_sdhci_raw_writel(host, val, reg); > +} > + > +static void bcm2835_sdhci_writew(struct sdhci_host *host, u16 val, int reg) > +{ > + static u32 shadow; > + > + u32 p = reg == SDHCI_COMMAND ? shadow : > + bcm2835_sdhci_raw_readl(host, reg& ~3); > + u32 s = reg<< 3& 0x18; > + u32 l = val<< s; > + u32 m = 0xffff<< s; > + > + if (reg == SDHCI_TRANSFER_MODE) > + shadow = (p& ~m) | l; > + else > + bcm2835_sdhci_raw_writel(host, (p& ~m) | l, reg& ~3); > +} > + > +static void bcm2835_sdhci_writeb(struct sdhci_host *host, u8 val, int reg) > +{ > + u32 p = bcm2835_sdhci_raw_readl(host, reg& ~3); > + u32 s = reg<< 3& 0x18; > + u32 l = val<< s; > + u32 m = 0xff<< s; > + > + bcm2835_sdhci_raw_writel(host, (p& ~m) | l, reg& ~3); > +} > + > +static u32 bcm2835_sdhci_readl(struct sdhci_host *host, int reg) > +{ > + u32 val = bcm2835_sdhci_raw_readl(host, reg); > + > + return val; > +} > + > +static u16 bcm2835_sdhci_readw(struct sdhci_host *host, int reg) > +{ > + u32 val = bcm2835_sdhci_raw_readl(host, (reg& ~3)); > + val = val>> (reg<< 3& 0x18)& 0xffff; > + > + return (u16)val; > +} > + > +static u8 bcm2835_sdhci_readb(struct sdhci_host *host, int reg) > +{ > + u32 val = bcm2835_sdhci_raw_readl(host, (reg& ~3)); > + val = val>> (reg<< 3& 0x18)& 0xff; > + > + return (u8)val; > +} Can the above used magics be made as macros? ~Vikram