From: Hayes Wang <hayeswang@realtek.com>
To: u-boot@lists.denx.de
Subject: [PATCH u-boot 2/4] eth/r8152: reset PHY after setting it
Date: Wed, 10 Jun 2020 09:47:53 +0000 [thread overview]
Message-ID: <509ebf533a804b2098f2265ec51e0dfa@realtek.com> (raw)
In-Reply-To: <ffc69557-67ab-1c48-4ec4-3db401cfb457@denx.de>
Marek Vasut [mailto:marex at denx.de]
> Sent: Tuesday, June 09, 2020 10:22 PM
[...]
> > - bmcr = BMCR_ANENABLE | BMCR_ANRESTART;
> > + bmcr = BMCR_ANENABLE | BMCR_ANRESTART | BMCR_RESET;
>
> Do you really need to reset a PHY while resetting the autonegotiation ?
> I think if you reset the PHY , then the ANEG operation is restarted by
> default or undefined, no ?
The setting is from the HW engineer. And I follow
the rule for a long time. I think they know what
they do.
Best Regards,
Hayes
next prev parent reply other threads:[~2020-06-10 9:47 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-09 8:53 [PATCH u-boot 0/4] r8152: support more chips Hayes Wang
2020-06-09 8:53 ` [PATCH u-boot 1/4] eth/r8152: reset bmu after disabling Tx/Rx Hayes Wang
2020-06-09 14:20 ` Marek Vasut
2020-06-10 9:27 ` Hayes Wang
2020-06-10 11:04 ` Marek Vasut
2020-06-11 3:18 ` Hayes Wang
2020-06-09 8:53 ` [PATCH u-boot 2/4] eth/r8152: reset PHY after setting it Hayes Wang
2020-06-09 14:22 ` Marek Vasut
2020-06-10 9:47 ` Hayes Wang [this message]
2020-06-10 11:06 ` Marek Vasut
2020-06-09 8:53 ` [PATCH u-boot 3/4] eth/r8152: modify rtl_clear_bp function Hayes Wang
2020-06-09 14:23 ` Marek Vasut
2020-06-09 8:53 ` [PATCH u-boot 4/4] eth/r8152: support RTL8153B/RTL8154B Hayes Wang
2020-06-09 14:27 ` Marek Vasut
2020-06-10 12:44 ` Hayes Wang
2020-06-10 12:54 ` Marek Vasut
2020-06-10 13:12 ` Hayes Wang
2020-06-10 13:20 ` Marek Vasut
2020-06-11 3:18 ` Hayes Wang
2020-06-12 0:05 ` Marek Vasut
2020-06-12 3:50 ` Hayes Wang
2020-06-12 11:52 ` Marek Vasut
2020-06-15 6:52 ` Hayes Wang
2020-06-15 7:34 ` Marek Vasut
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