From mboxrd@z Thu Jan 1 00:00:00 1970 From: Vipin Kumar Date: Thu, 13 Dec 2012 11:41:42 +0530 Subject: [U-Boot] [PATCH v2] usbh/ehci: Increase timeout for enumeration In-Reply-To: <201212121225.11667.marex@denx.de> References: <50C1BEDD.6040202@compulab.co.il> <50C8543F.8000508@st.com> <201212121225.11667.marex@denx.de> Message-ID: <50C9719E.9050001@st.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 12/12/2012 4:55 PM, Marek Vasut wrote: > Dear Vipin Kumar, > >>>> + ulong start = get_timer(0); >>>> + >>>> + do { >>>> + ret = usb_get_port_status(dev, i + 1, portsts); >>>> + if (ret< 0) { >>>> + USB_HUB_PRINTF("get_port_status failed\n"); >>>> + break; >>>> + } >>>> + >>>> + portstatus = le16_to_cpu(portsts->wPortStatus); >>>> + portchange = le16_to_cpu(portsts->wPortChange); >>>> + >>>> + if ((portchange& USB_PORT_STAT_C_CONNECTION) == >>>> + (portstatus& USB_PORT_STAT_CONNECTION)) >>> >>> I don't know if there is any corner case when the above check >>> will always fail and so it will always wait a maximal delay time. >>> Are those registers that identical, or can there be differences? >>> >>>> + break; >>>> + >>>> + mdelay(100); >>>> + } while (get_timer(start)< CONFIG_SYS_HZ * 10); >>> >>> Is there any justification for the CONFIG_SYS_HZ * 10? >>> I would be much more fine with this patch if there were any >>> (even just test based * 2) reason for that number. >> >> Not really. Just a practical test. >> Marek, can I have comments from you as well >> > > Sorry, I'm really busy these days. I went through it and I see Igor still has > some comment. Just fix that one and I'm good. > Thanks marek, I would send a v3 soon > Best regards, > Marek Vasut > . >