[U-Boot] [PATCH v2 03/58] arm: Move timer_rate_hz into arch_global_data

Simon Glass
2012-12-14T06:48:32Z

Move this field into arch_global_data and tidy up.

Signed-off-by: Simon Glass <sjg@chromium.org>
---
Changes in v2: None

arch/arm/cpu/arm920t/a320/timer.c | 8 ++++----
arch/arm/cpu/arm920t/s3c24x0/timer.c | 4 ++--
arch/arm/cpu/arm926ejs/at91/timer.c | 8 ++++----
arch/arm/cpu/arm926ejs/davinci/timer.c | 9 +++++----
arch/arm/include/asm/global_data.h | 3 ++-
5 files changed, 17 insertions(+), 15 deletions(-)

diff --git a/arch/arm/cpu/arm920t/a320/timer.c b/arch/arm/cpu/arm920t/a320/timer.c
index 4bfcef2..2873643 100644
--- a/arch/arm/cpu/arm920t/a320/timer.c
+++ b/arch/arm/cpu/arm920t/a320/timer.c
@@ -31,14 +31,14 @@ DECLARE_GLOBAL_DATA_PTR;
static inline unsigned long long tick_to_time(unsigned long long tick)
{
tick *= CONFIG_SYS_HZ;
- do_div(tick, gd->timer_rate_hz);
+ do_div(tick, gd->arch.timer_rate_hz);

return tick;
}

static inline unsigned long long usec_to_tick(unsigned long long usec)
{
- usec *= gd->timer_rate_hz;
+ usec *= gd->arch.timer_rate_hz;
do_div(usec, 1000000);

return usec;
@@ -74,7 +74,7 @@ int timer_init(void)
cr |= FTTMR010_TM3_ENABLE;
writel(cr, &tmr->cr);

- gd->timer_rate_hz = TIMER_CLOCK;
+ gd->arch.timer_rate_hz = TIMER_CLOCK;
gd->tbu = gd->tbl = 0;

return 0;
@@ -126,5 +126,5 @@ ulong get_timer(ulong base)
*/
ulong get_tbclk(void)
{
- return gd->timer_rate_hz;
+ return gd->arch.timer_rate_hz;
}
diff --git a/arch/arm/cpu/arm920t/s3c24x0/timer.c b/arch/arm/cpu/arm920t/s3c24x0/timer.c
index d8668be..7694fea 100644
--- a/arch/arm/cpu/arm920t/s3c24x0/timer.c
+++ b/arch/arm/cpu/arm920t/s3c24x0/timer.c
@@ -52,7 +52,7 @@ int timer_init(void)
* @33.25MHz and 15625 @ 50 MHz
*/
gd->tbu = get_PCLK() / (2 * 16 * 100);
- gd->timer_rate_hz = get_PCLK() / (2 * 16);
+ gd->arch.timer_rate_hz = get_PCLK() / (2 * 16);
}
/* load value for 10 ms timeout */
writel(gd->tbu, &timers->tcntb4);
@@ -93,7 +93,7 @@ ulong get_timer_masked(void)
{
ulong tmr = get_ticks();

- return tmr / (gd->timer_rate_hz / CONFIG_SYS_HZ);
+ return tmr / (gd->arch.timer_rate_hz / CONFIG_SYS_HZ);
}

void udelay_masked(unsigned long usec)
diff --git a/arch/arm/cpu/arm926ejs/at91/timer.c b/arch/arm/cpu/arm926ejs/at91/timer.c
index 641ae3e..061ccaf 100644
--- a/arch/arm/cpu/arm926ejs/at91/timer.c
+++ b/arch/arm/cpu/arm926ejs/at91/timer.c
@@ -52,14 +52,14 @@ DECLARE_GLOBAL_DATA_PTR;
static inline unsigned long long tick_to_time(unsigned long long tick)
{
tick *= CONFIG_SYS_HZ;
- do_div(tick, gd->timer_rate_hz);
+ do_div(tick, gd->arch.timer_rate_hz);

return tick;
}

static inline unsigned long long usec_to_tick(unsigned long long usec)
{
- usec *= gd->timer_rate_hz;
+ usec *= gd->arch.timer_rate_hz;
do_div(usec, 1000000);

return usec;
@@ -79,7 +79,7 @@ int timer_init(void)
/* Enable PITC */
writel(TIMER_LOAD_VAL | AT91_PIT_MR_EN , &pit->mr);

- gd->timer_rate_hz = gd->arch.mck_rate_hz / 16;
+ gd->arch.timer_rate_hz = gd->arch.mck_rate_hz / 16;
gd->tbu = gd->tbl = 0;

return 0;
@@ -132,5 +132,5 @@ ulong get_timer(ulong base)
*/
ulong get_tbclk(void)
{
- return gd->timer_rate_hz;
+ return gd->arch.timer_rate_hz;
}
diff --git a/arch/arm/cpu/arm926ejs/davinci/timer.c b/arch/arm/cpu/arm926ejs/davinci/timer.c
index 93c9e60..7e852b5 100644
--- a/arch/arm/cpu/arm926ejs/davinci/timer.c
+++ b/arch/arm/cpu/arm926ejs/davinci/timer.c
@@ -60,7 +60,7 @@ int timer_init(void)
writel(0x0, &timer->tim34);
writel(TIMER_LOAD_VAL, &timer->prd34);
writel(2 << 22, &timer->tcr);
- gd->timer_rate_hz = CONFIG_SYS_HZ_CLOCK / TIM_CLK_DIV;
+ gd->arch.timer_rate_hz = CONFIG_SYS_HZ_CLOCK / TIM_CLK_DIV;
gd->timer_reset_value = 0;

return(0);
@@ -87,14 +87,15 @@ ulong get_timer(ulong base)

timer_diff = get_ticks() - gd->timer_reset_value;

- return lldiv(timer_diff, (gd->timer_rate_hz / CONFIG_SYS_HZ)) - base;
+ return lldiv(timer_diff,
+ (gd->arch.timer_rate_hz / CONFIG_SYS_HZ)) - base;
}

void __udelay(unsigned long usec)
{
unsigned long long endtime;

- endtime = lldiv((unsigned long long)usec * gd->timer_rate_hz,
+ endtime = lldiv((unsigned long long)usec * gd->arch.timer_rate_hz,
1000000UL);
endtime += get_ticks();

@@ -108,7 +109,7 @@ void __udelay(unsigned long usec)
*/
ulong get_tbclk(void)
{
- return gd->timer_rate_hz;
+ return gd->arch.timer_rate_hz;
}

#ifdef CONFIG_HW_WATCHDOG
diff --git a/arch/arm/include/asm/global_data.h b/arch/arm/include/asm/global_data.h
index ba7814a..7a2f644 100644
--- a/arch/arm/include/asm/global_data.h
+++ b/arch/arm/include/asm/global_data.h
@@ -35,6 +35,8 @@ struct arch_global_data {
unsigned long pllb_rate_hz;
unsigned long at91_pllb_usb_init;
#endif
+ /* "static data" needed by most of timer.c on ARM platforms */
+ unsigned long timer_rate_hz;
};

/*
@@ -61,7 +63,6 @@ typedef struct global_data {
#endif
#ifdef CONFIG_ARM
/* "static data" needed by most of timer.c on ARM platforms */
- unsigned long timer_rate_hz;
unsigned long tbl;
unsigned long tbu;
unsigned long long timer_reset_value;
--
1.7.7.3