[U-Boot] configuring U-Boot for custom board based on at91rm9200ek

["Andreas Bießmann" <andreas.devel@googlemail.com>]

Dear arivendu bhardwaj,

On 18.12.2012 14:40, arivendu bhardwaj wrote:
> Hi
> i need to configure u-boot-2012.10, for my custom board, that is very close
> to at91rm9200ek, except that i have 32MB NOR flash, and 32MB SDRAM.
> what i fail to understand is the following config parameters:
> 
> 
> #define CONFIG_SYS_PIOC_ASR_VAL
> #define CONFIG_SYS_PIOC_BSR_VAL
> //#define CONFIG_SYS_PIOC_PDR_VAL
> #define CONFIG_SYS_PIOC_PDR_VAL

These PIOC values configure the PIO_ASR, PIO_BSR, PIO_PDR for bank 'C',
please look up the correct values in your SoC datasheet.

> #define CONFIG_SYS_EBI_CSA_VAL

This one configures the EBI_CSA register.

> #define CONFIG_SYS_SDRC_CR_VAL
> #define CONFIG_SYS_SDRAM                 CONFIG_SYS_SDRAM_BASE /* address
> of the SDRAM */
> #define CONFIG_SYS_SDRAM1                (CONFIG_SYS_SDRAM_BASE+0x80)
> #define CONFIG_SYS_SDRAM_VAL
> #define CONFIG_SYS_SDRC_MR_VAL
> #define CONFIG_SYS_SDRC_MR_VAL1
> #define CONFIG_SYS_SDRC_MR_VAL2
> #define CONFIG_SYS_SDRC_MR_VAL3
> #define CONFIG_SYS_SDRC_TR_VAL

These SDRC values are a bit trickier. They define the required
initialization process of the SDRAM interface of this SoC. You will need
to write some registers in your SoC and then write some data to the
SDRAM, see the datasheet of SoC for correct sequence and to understand
why they are written down that way.

To enable 32MiB NOR flash you will need to setup the correct
PHYS_FLASH_SIZE and all the CONFIG_SYS_*_FLASH_* variables. Changing the
EBI may also be required and maybe also PIOC settings to have enough
address lines.

To enable 32MiB SDRAM you will need to setup CONFIG_SYS_SDRAM_SIZE and
change the CONFIG_SYS_SDRC_CR_VAL and CONFIG_SYS_SDRC_TR_VAL to your
needs. Please look up the correct values in your respective datasheets.

Side note: at91rm9200ek still has 32MiB RAM

Best regards

Andreas Bie?mann