From mboxrd@z Thu Jan 1 00:00:00 1970 From: Donghwa Lee Date: Thu, 03 Jan 2013 17:43:21 +0900 Subject: [U-Boot] [PATCH 2/2] EXYNOS: EXYNOS5250: add gpio structure for EXYNOS5250 Message-ID: <50E544A9.4000107@samsung.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de This patch add gpio structure of exynos5250. Exynos5xxx series has each different gpio bank, so it is needed to separate. After separation task, useless variables will be removed. Signed-off-by: Donghwa Lee Signed-off-by: Kyungmin Park --- arch/arm/include/asm/arch-exynos/gpio.h | 80 +++++++++++++++++++++++++++++++ 1 files changed, 80 insertions(+), 0 deletions(-) diff --git a/arch/arm/include/asm/arch-exynos/gpio.h b/arch/arm/include/asm/arch-exynos/gpio.h index cfe1024..be84b87 100644 --- a/arch/arm/include/asm/arch-exynos/gpio.h +++ b/arch/arm/include/asm/arch-exynos/gpio.h @@ -196,6 +196,62 @@ struct exynos5_gpio_part4 { struct s5p_gpio_bank z; }; +struct exynos5250_gpio_part1 { + struct s5p_gpio_bank a0; + struct s5p_gpio_bank a1; + struct s5p_gpio_bank a2; + struct s5p_gpio_bank b0; + struct s5p_gpio_bank b1; + struct s5p_gpio_bank b2; + struct s5p_gpio_bank b3; + struct s5p_gpio_bank c0; + struct s5p_gpio_bank c1; + struct s5p_gpio_bank c2; + struct s5p_gpio_bank c3; + struct s5p_gpio_bank d0; + struct s5p_gpio_bank d1; + struct s5p_gpio_bank y0; + struct s5p_gpio_bank y1; + struct s5p_gpio_bank y2; + struct s5p_gpio_bank y3; + struct s5p_gpio_bank y4; + struct s5p_gpio_bank y5; + struct s5p_gpio_bank y6; + struct s5p_gpio_bank res1[0x3]; + struct s5p_gpio_bank c4; + struct s5p_gpio_bank res2[0x48]; + struct s5p_gpio_bank x0; + struct s5p_gpio_bank x1; + struct s5p_gpio_bank x2; + struct s5p_gpio_bank x3; +}; + +struct exynos5250_gpio_part2 { + struct s5p_gpio_bank e0; + struct s5p_gpio_bank e1; + struct s5p_gpio_bank f0; + struct s5p_gpio_bank f1; + struct s5p_gpio_bank g0; + struct s5p_gpio_bank g1; + struct s5p_gpio_bank g2; + struct s5p_gpio_bank h0; + struct s5p_gpio_bank h1; +}; + +struct exynos5250_gpio_part3 { + struct s5p_gpio_bank v0; + struct s5p_gpio_bank v1; + struct s5p_gpio_bank res1[0x1]; + struct s5p_gpio_bank v2; + struct s5p_gpio_bank v3; + struct s5p_gpio_bank res2[0x1]; + struct s5p_gpio_bank v4; +}; + +struct exynos5250_gpio_part4 { + struct s5p_gpio_bank z; +}; + /* functions */ void s5p_gpio_cfg_pin(struct s5p_gpio_bank *bank, int gpio, int cfg); void s5p_gpio_direction_output(struct s5p_gpio_bank *bank, int gpio, int en); @@ -272,6 +328,30 @@ void s5p_gpio_set_rate(struct s5p_gpio_bank *bank, int gpio, int mode); - EXYNOS5_GPIO_PART3_BASE) / sizeof(struct s5p_gpio_bank)) \ * GPIO_PER_BANK) + pin) + EXYNOS5_GPIO_PART2_MAX) +#define exynos5250_gpio_part1_get_nr(bank, pin) \ + ((((((unsigned int) &(((struct exynos5250_gpio_part1 *) \ + EXYNOS5250_GPIO_PART1_BASE)->bank)) \ + - EXYNOS5250_GPIO_PART1_BASE) / sizeof(struct s5p_gpio_bank)) \ + * GPIO_PER_BANK) + pin) + +#define EXYNOS5250_GPIO_PART1_MAX ((sizeof(struct exynos5250_gpio_part1) \ + / sizeof(struct s5p_gpio_bank)) * GPIO_PER_BANK) + +#define exynos5250_gpio_part2_get_nr(bank, pin) \ + (((((((unsigned int) &(((struct exynos5250_gpio_part2 *) \ + EXYNOS5250_GPIO_PART2_BASE)->bank)) \ + - EXYNOS52590_GPIO_PART2_BASE) / sizeof(struct s5p_gpio_bank)) \ + * GPIO_PER_BANK) + pin) + EXYNOS5250_GPIO_PART1_MAX) + +#define EXYNOS5250_GPIO_PART2_MAX ((sizeof(struct exynos5250_gpio_part2) \ + / sizeof(struct s5p_gpio_bank)) * GPIO_PER_BANK) + +#define exynos5250_gpio_part3_get_nr(bank, pin) \ + (((((((unsigned int) &(((struct exynos5250_gpio_part3 *) \ + EXYNOS5250_GPIO_PART3_BASE)->bank)) \ + - EXYNOS5250_GPIO_PART3_BASE) / sizeof(struct s5p_gpio_bank)) \ + * GPIO_PER_BANK) + pin) + EXYNOS5250_GPIO_PART2_MAX) + static inline unsigned int s5p_gpio_base(int nr) { if (cpu_is_exynos5()) { -- 1.7.4.1