[U-Boot] [PATCH v2] mx6: Add workaround for ARM errata

[U-Boot] [PATCH v2] mx6: Add workaround for ARM errata

[Fabio Estevam]

From: Fabio Estevam <fabio.estevam@freescale.com>

Add workaround for the following ARM errata: 743622 and 751472.

The motivation for this change is the following kernel commit 62e4d357a 
(ARM: 7609/1: disable errata work-arounds which access
secure registers), which removes the errata from multiplatform kernel.

Since imx has been converted to multiplatform in the kernel, we need to apply
such workaround into the bootloader.

Workaround code has been taken from arch/arm/mm/proc-v7.S from 3.7.1 kernel.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
---
Following patch has been proposed into arm kernel mailing list:
http://www.spinics.net/lists/arm-kernel/msg214840.html

Changes since v1:
- Use the same style of the erratum in arch/arm/cpu/armv7/mx5/lowlevel_init.S.

 arch/arm/cpu/armv7/mx6/lowlevel_init.S |   10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm/cpu/armv7/mx6/lowlevel_init.S b/arch/arm/cpu/armv7/mx6/lowlevel_init.S
index acadef2..ae8141d 100644
--- a/arch/arm/cpu/armv7/mx6/lowlevel_init.S
+++ b/arch/arm/cpu/armv7/mx6/lowlevel_init.S
@@ -20,6 +20,16 @@
 
 #include <linux/linkage.h>
 
+.macro init_arm_errata
+	mrc 15, 0, r1, c1, c0, 1		/* read diagnostic register */
+	/* ARM erratum ID #743622 */
+	orr r1, r1, #(1 << 6)			/* set bit #6 */
+	/* ARM erratum ID #751472 */
+	orr r1, r1, #(1 << 11)			/* set bit #11 */
+	mcr 15, 0, r1, c1, c0, 1		/* write diagnostic register */
+.endm
+
 ENTRY(lowlevel_init)
+	init_arm_errata
 	mov pc, lr
 ENDPROC(lowlevel_init)
-- 
1.7.9.5

[U-Boot] [PATCH v2] mx6: Add workaround for ARM errata

[Troy Kisky]

On 1/4/2013 5:54 PM, Fabio Estevam wrote:
> From: Fabio Estevam <fabio.estevam@freescale.com>
>
> Add workaround for the following ARM errata: 743622 and 751472.
>
> The motivation for this change is the following kernel commit 62e4d357a
> (ARM: 7609/1: disable errata work-arounds which access
> secure registers), which removes the errata from multiplatform kernel.
>
> Since imx has been converted to multiplatform in the kernel, we need to apply
> such workaround into the bootloader.
>
> Workaround code has been taken from arch/arm/mm/proc-v7.S from 3.7.1 kernel.
>
> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
> ---
> Following patch has been proposed into arm kernel mailing list:
> http://www.spinics.net/lists/arm-kernel/msg214840.html
>
> Changes since v1:
> - Use the same style of the erratum in arch/arm/cpu/armv7/mx5/lowlevel_init.S.
>
>   arch/arm/cpu/armv7/mx6/lowlevel_init.S |   10 ++++++++++
>   1 file changed, 10 insertions(+)
>
> diff --git a/arch/arm/cpu/armv7/mx6/lowlevel_init.S b/arch/arm/cpu/armv7/mx6/lowlevel_init.S
> index acadef2..ae8141d 100644
> --- a/arch/arm/cpu/armv7/mx6/lowlevel_init.S
> +++ b/arch/arm/cpu/armv7/mx6/lowlevel_init.S
> @@ -20,6 +20,16 @@
>   
>   #include <linux/linkage.h>
>   
> +.macro init_arm_errata
> +	mrc 15, 0, r1, c1, c0, 1		/* read diagnostic register */
i.MX 6Quad_6Dual Errata (Rev 0) TO1.2.pdf says this should be

mrc 15, 0, r1, c15, c0, 1

Since it also says "undocumented Diagnostic Control register"
and "c1, c0, 1" is "Auxiliary Control Register" I think c15 is right.

Besides, you had C15 in rev 1.

> +	/* ARM erratum ID #743622 */
> +	orr r1, r1, #(1 << 6)			/* set bit #6 */
> +	/* ARM erratum ID #751472 */
> +	orr r1, r1, #(1 << 11)			/* set bit #11 */
> +	mcr 15, 0, r1, c1, c0, 1		/* write diagnostic register */

mcr 15, 0, r1, c15, c0, 1

> +.endm
> +
>   ENTRY(lowlevel_init)
> +	init_arm_errata
>   	mov pc, lr
>   ENDPROC(lowlevel_init)