From mboxrd@z Thu Jan 1 00:00:00 1970 From: Tom Rini Date: Thu, 31 Jan 2013 11:29:58 -0500 Subject: [U-Boot] [PATCH 1/7] ARM: OMAP4+: emif: Detect SDRAM from SDRAM config register In-Reply-To: <1359611525-19017-2-git-send-email-r.sricharan@ti.com> References: <1359611525-19017-1-git-send-email-r.sricharan@ti.com> <1359611525-19017-2-git-send-email-r.sricharan@ti.com> Message-ID: <510A9C06.6030102@ti.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de -----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 On 01/31/2013 12:51 AM, R Sricharan wrote: > From: Lokesh Vutla > > Now SDRAM initialization is done on the basis of omap revision. > Instead this should be done on basis of SDRAM type read from > EMIF_SDRAM_CONFIG register. This will be helpful to avoid > unnessecary cpu checks for new boards > > Signed-off-by: R Sricharan Signed-off-by: > Lokesh Vutla Does this mean the ROM is already doing some basic EMIF programming here? I swear I looked down this path before, when I wanted to share this code with am33xx and the problem is that while the registers aren't reset on warm boot, on cold boot they always come up in a default value, for both DDR2 and DDR3. Or are you able to get by as the platforms come up with different default values? - -- Tom -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) Comment: Using GnuPG with Thunderbird - http://www.enigmail.net/ iQIcBAEBAgAGBQJRCpwGAAoJENk4IS6UOR1WpawP/jJE1GjmUCSDyC5yFyF2nRc2 gMxvIOni2Dl/y8EbvQyRMkJunzjHLxHmUqQLXLsauAalyx2xnBQ3WRhYNFR7G5jX vOlvsn4h5L2FdQL97/5pnsKNxdgXACw2HSidIFDGQ5/o9e53Tn3ZU7BN8bYaNEep AS7vF/ewOIbPlcavf4ov7DoICLpp8RMGPOQ+7yHAsEWfPnH3ZlfLNcUjxKzNTVpU PGeNbka50rliEaSTbNFklpy3E09O3kNvskk6TdGnRPL6/+CR2Z9jAqeVOSGnZYTr fagd9hlBB5HTfdBm8l2f2RRAce+t0lbvxl5wjqo+Wo+HZkf+c3/QBNe8jeDRblF5 OOixfQGq92LuqpF+HWlwnmV7R5TyF9CbuHRuDLGMux7h3YT4dsLuvUasRIAhKyUp NyMgdw5Ytn39kE5CT3jjYbqhiYk6O1Wo1GO6xoP2N7Zn4SqK7tkX62YDPkBw8B/v 3yI5TMmuy/tTqSUsP3xevk6yf8uPFDZwNX1yIbWBmm3acX8kShIAZsXWPC42V3Pc h3RbgBpTAU7XE9kFOSK5epk6OlipjiEdlo9Auh35yZ976bwmQsfdT5eFzLSsBO+g f9c9KZPgg/oC82vMPOZ479a4DqapuLCdR3wTtgxaycvhqLDVSxoKbgZSyE6RAuSt bXLDlFS0Lx4jqAuCWnE4 =l/qE -----END PGP SIGNATURE-----