[U-Boot] [PATCH 1/7] ARM: OMAP4+: emif: Detect SDRAM from SDRAM config register

[R Sricharan <r.sricharan@ti.com>]

On Thursday 31 January 2013 09:59 PM, Tom Rini wrote:
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> On 01/31/2013 12:51 AM, R Sricharan wrote:
>> From: Lokesh Vutla <lokeshvutla@ti.com>
>>
>> Now SDRAM initialization is done on the basis of omap revision.
>> Instead this should be done on basis of SDRAM type read from
>> EMIF_SDRAM_CONFIG register. This will be helpful to avoid
>> unnessecary cpu checks for new boards
>>
>> Signed-off-by: R Sricharan <r.sricharan@ti.com> Signed-off-by:
>> Lokesh Vutla <lokeshvutla@ti.com>
>
> Does this mean the ROM is already doing some basic EMIF programming
> here?  I swear I looked down this path before, when I wanted to share
> this code with am33xx and the problem is that while the registers
> aren't reset on warm boot, on cold boot they always come up in a
> default value, for both DDR2 and DDR3.
>
> Or are you able to get by as the platforms come up with different
> default values?
>
  Not the ROMCODE, the default value for SDRAM_CONFIG register is
  exported from control module register based on efuse settings. We did
  see that this default value was correct depending upon LPDDR2 or DDR3
  in the case of OMAP.

  So does this mean that am3xx did not have the logic to
  load this register dynamically based on efuse settings ?
  If that is the only exception, then we can hardcode the register
  during startup only in that case. Except for this, where you able
  to use the emif-common driver in your case ?

Regards,
  Sricharan