From mboxrd@z Thu Jan 1 00:00:00 1970 From: R Sricharan Date: Fri, 1 Feb 2013 13:45:41 +0530 Subject: [U-Boot] [PATCH 5/5] ARM: OMAP5: srcomp: enable slew rate compensation cells after powerup In-Reply-To: <20130131172033.GI30932@bill-the-cat> References: <1359612150-20076-1-git-send-email-r.sricharan@ti.com> <1359612150-20076-6-git-send-email-r.sricharan@ti.com> <20130131172033.GI30932@bill-the-cat> Message-ID: <510B79AD.8060807@ti.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Tom, On Thursday 31 January 2013 10:50 PM, Tom Rini wrote: > On Thu, Jan 31, 2013 at 11:32:30AM +0530, R Sricharan wrote: > >> From: Lokesh Vutla >> >> After power-up SRCOMP cells are by-passed by default in OMAP5. >> Software has to enable these SRCOMP sells. >> For ES2: All 5 SRCOMP cells needs to be enabled. >> For ES1: Only 4 SRCOMP cells in core power domain are enabled. >> The 1 in wkup domain is not enabled because smart i/os >> of wkup domain work with default compensation code. >> >> Signed-off-by: R Sricharan >> Signed-off-by: Lokesh Vutla > > With the caveat that a few formatting things looked odd, but I'm > assuming you ran this series past checkpatch.pl and it's clean: > > Reviewed-by: Tom Rini > I indeed ran checkpatch. There were no warnings, except for one patch where clocks data was moved from one file to other because of comments exceeding 80 characters, but that was unavoidable. Otherwise, rest was fine. Regards, Sricharan