From mboxrd@z Thu Jan 1 00:00:00 1970 From: Gabor Juhos Date: Sun, 03 Feb 2013 09:02:25 +0100 Subject: [U-Boot] [PATCH v2 02/10] MIPS: qemu-malta: add reset support In-Reply-To: References: <1359821166-32352-1-git-send-email-juhosg@openwrt.org> <1359821166-32352-3-git-send-email-juhosg@openwrt.org> Message-ID: <510E1991.10408@openwrt.org> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de 2013.02.02. 20:35 keltez?ssel, Daniel Schwierzeck ?rta: >> diff --git a/board/qemu-malta/qemu-malta.c b/board/qemu-malta/qemu-malta.c >> index 9ba711d..9333242 100644 >> --- a/board/qemu-malta/qemu-malta.c >> +++ b/board/qemu-malta/qemu-malta.c >> @@ -8,6 +8,9 @@ >> >> #include >> >> +#include >> +#include >> + >> phys_size_t initdram(int board_type) >> { >> return CONFIG_SYS_MEM_SIZE; >> @@ -18,3 +21,11 @@ int checkboard(void) >> puts("Board: MIPS Malta CoreLV (Qemu)\n"); >> return 0; >> } >> + >> +void _machine_restart(void) >> +{ >> + void __iomem *reset_base; >> + >> + reset_base = (void __iomem *) CKSEG1ADDR(MALTA_RESET_BASE); >> + __raw_writel(le32_to_cpu(GORESET), reset_base); > > don't you need to swap from CPU endianess to register/bus endinaness? > I think regisers/bus are always BE and only CPU changes between LE/BE. > So we either need __raw_writel(cpu_to_be32(v),a) or writel_be32(v,a). The register uses the same endianness as the CPU, so we have to write either a LE or BE value depending on the CPU endianness. This means that we should use the __raw_writel accessor with a plain GORESET value. That method works in Linux but does not work in U-Boot. The Malta board needs the CONFIG_SWAP_IO_SPACE for PCI device acccess. If this config options is set then the __raw_writel accessor will swap the given value on BE systems. So I have to pre-swap the value with le32_to_cpu to make it working correctly. The relevant definitions from 'arch/mips/include/asm/io.h': > #if defined(CONFIG_SWAP_IO_SPACE) && defined(__MIPSEB__) > > #define __ioswab8(x) (x) > #define __ioswab16(x) swab16(x) > #define __ioswab32(x) swab32(x) > > #else > ... > #define writeb(b,addr) (*(volatile unsigned char *)(addr)) = (b) > #define writew(b,addr) (*(volatile unsigned short *)(addr)) = (__ioswab16(b)) > #define writel(b,addr) (*(volatile unsigned int *)(addr)) = (__ioswab32(b)) > #define __raw_writeb writeb > #define __raw_writew writew > #define __raw_writel writel Maybe here is the time to fix these accessors in asm/io.h? -Gabor