[U-Boot] [PATCH v2 2/3] Tegra114: fdt: Update DT files with I2C info for T114/Dalmore

[Stephen Warren <swarren@wwwdotorg.org>]

On 02/06/2013 04:26 PM, Tom Warren wrote:
> Note that T114 does not have a separate/different DVC (power I2C)
> controller like T20 - all 5 I2C controllers are identical, but
> I2C5 is used to designate the controller intended for power
> control (PWR_I2C in the schematics).

> diff --git a/arch/arm/dts/tegra114.dtsi b/arch/arm/dts/tegra114.dtsi

> +	tegra_car: clock at 60006000 {
> +		compatible = "nvidia,tegra114-car, nvidia,tegra30-car";

Only the Tegra114 value should be listed here; the presence of the
Tegra30 value in the upstream kernel is a mistake that will be fixed as
part of the Tegra114 clock driver patches.

> +	i2c at 7000c000 {
> +		compatible = "nvidia,tegra114-i2c", "nvidia,tegra20-i2c";

Same here; only include the Tegra114 value since the HW isn't 100%
compatible with the Tegra20 HW.

> diff --git a/board/nvidia/dts/tegra114-dalmore.dts b/board/nvidia/dts/tegra114-dalmore.dts

> +	i2c at 7000d000 {
> +		status = "okay";
> +		clock-frequency = <100000>;
> +	};

According to our downstream Linux kernel, that I2C controller can run up
to 400KHz on this board.