From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stefano Babic Date: Tue, 12 Feb 2013 13:40:32 +0100 Subject: [U-Boot] [PATCH v3] mx6: Disable Power Down Bit of watchdog In-Reply-To: <1360255523-16620-1-git-send-email-fabio.estevam@freescale.com> References: <1360255523-16620-1-git-send-email-fabio.estevam@freescale.com> Message-ID: <511A3840.3080204@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 07/02/2013 17:45, Fabio Estevam wrote: > On a mx6qsabresd revision C board with rev1.2 mx6q, the system gets resetted > and it is not able to reach the Linux prompt. > > Comparing the watchdog behaviour on a revB versus revC board: > > - On a mx6qsabresd revB: > > U-Boot > reset > resetting ... > > U-Boot 2013.01-10524-g432a3aa-dirty (Feb 07 2013 - 13:34:46) > > CPU: Freescale i.MX6Q rev1.1 at 792 MHz > Reset cause: WDOG > ... > > - On a mx6qsabresd revC: > > U-Boot > reset > resetting ... > > U-Boot 2013.01-10524-g432a3aa-dirty (Feb 07 2013 - 13:34:46) > > CPU: Freescale i.MX6Q rev1.1 at 792 MHz > Reset cause: POR > > So due to revC POR/watchdog circuitry whenever a watchdog occurs, it causes a POR. > > Clearing the PDE - Power Down Enable bit of WMCR registers fixes the problem and > is also safe for all mx6 boards. > > Signed-off-by: Fabio Estevam > --- Acked-by: Stefano Babic Best regards, Stefano Babic -- ===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================