From: Stefano Babic <sbabic@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 1/6] imx: mx6q DDR3 init: Fix tMRD
Date: Tue, 12 Feb 2013 13:53:46 +0100 [thread overview]
Message-ID: <511A3B5A.5080604@denx.de> (raw)
In-Reply-To: <1359580758-20743-1-git-send-email-benoit.thebaudeau@advansee.com>
On 30/01/2013 22:19, Beno?t Th?baudeau wrote:
> MMDC1_MDCFG1.tMRD should be set to max(tMRD, tMOD) for DDR3.
>
> For all DDR3 speed bins:
> tMRD(min) = 4 nCK
> tMOD(min) = max(12 nCK, 15 ns)
>
> Hence, MMDC1_MDCFG1.tMRD should be set to max(12 nCK, 15 ns), which is 12 nCK
> at 532 MHz, encoded as 0xB in the bit-field MMDC1_MDCFG1[8:5].
>
> Signed-off-by: Beno?t Th?baudeau <benoit.thebaudeau@advansee.com>
> ---
> board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg
> index c86cd40..9ac8027 100644
> --- a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg
> +++ b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg
> @@ -110,7 +110,7 @@ DATA 4 0x021b0018 0x00081740
>
> DATA 4 0x021b001c 0x00008000
> DATA 4 0x021b000c 0x555A7975
> -DATA 4 0x021b0010 0xFF538E64
> +DATA 4 0x021b0010 0xFF538F64
> DATA 4 0x021b0014 0x01FF00DB
> DATA 4 0x021b002c 0x000026D2
>
Applied (whole series) to u-boot-imx, thanks.
Best regards,
Stefano Babic
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prev parent reply other threads:[~2013-02-12 12:53 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-01-30 21:19 [U-Boot] [PATCH 1/6] imx: mx6q DDR3 init: Fix tMRD Benoît Thébaudeau
2013-01-30 21:19 ` [U-Boot] [PATCH 2/6] imx: mx6q DDR3 init: Fix tXPR Benoît Thébaudeau
2013-01-30 21:19 ` [U-Boot] [PATCH 3/6] imx: mx6q DDR3 init: Fix SDE_to_RST Benoît Thébaudeau
2013-01-30 21:19 ` [U-Boot] [PATCH 4/6] imx: mx6q DDR3 init: Fix RST_to_CKE Benoît Thébaudeau
2013-01-30 21:19 ` [U-Boot] [PATCH 5/6] imx: mx6q DDR3 init: Fix MR0.PPD Benoît Thébaudeau
2013-01-30 21:19 ` [U-Boot] [PATCH 6/6] imx: mx6q DDR3 init: Benefit from available CL = 7 Benoît Thébaudeau
2013-01-31 23:14 ` [U-Boot] [PATCH 1/6] imx: mx6q DDR3 init: Fix tMRD Eric Nelson
2013-01-31 23:25 ` Benoît Thébaudeau
2013-02-01 18:28 ` Eric Nelson
2013-02-01 18:29 ` Benoît Thébaudeau
2013-02-12 12:53 ` Stefano Babic [this message]
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