[U-Boot] [PATCH] Initialise correct GPMC WAITx irq for AM33xx

[U-Boot] [PATCH] Initialise correct GPMC WAITx irq for AM33xx

[Mark Jackson]

Currently WAIT0 irq is reset and then WAIT1 irq is enabled.
Fix it such that WAIT0 irq is enabled instead.

Signed-off-by: Mark Jackson <mpfj@newflow.co.uk>
---
 arch/arm/cpu/armv7/am33xx/mem.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/cpu/armv7/am33xx/mem.c b/arch/arm/cpu/armv7/am33xx/mem.c
index b8f54ab..b86b0de 100644
--- a/arch/arm/cpu/armv7/am33xx/mem.c
+++ b/arch/arm/cpu/armv7/am33xx/mem.c
@@ -83,7 +83,7 @@ void gpmc_init(void)
 	/* global settings */
 	writel(0x00000008, &gpmc_cfg->sysconfig);
 	writel(0x00000100, &gpmc_cfg->irqstatus);
-	writel(0x00000200, &gpmc_cfg->irqenable);
+	writel(0x00000100, &gpmc_cfg->irqenable);
 	writel(0x00000012, &gpmc_cfg->config);
 	/*
 	 * Disable the GPMC0 config set by ROM code
-- 
1.7.9.5

[U-Boot] [PATCH] Initialise correct GPMC WAITx irq for AM33xx

[Peter Korsgaard]

>>>>> "Mark" == Mark Jackson <mpfj-list@mimc.co.uk> writes:

 Mark> Currently WAIT0 irq is reset and then WAIT1 irq is enabled.
 Mark> Fix it such that WAIT0 irq is enabled instead.

 Mark> Signed-off-by: Mark Jackson <mpfj@newflow.co.uk>
 Mark> ---
 Mark>  arch/arm/cpu/armv7/am33xx/mem.c |    2 +-
 Mark>  1 file changed, 1 insertion(+), 1 deletion(-)

 Mark> diff --git a/arch/arm/cpu/armv7/am33xx/mem.c b/arch/arm/cpu/armv7/am33xx/mem.c
 Mark> index b8f54ab..b86b0de 100644
 Mark> --- a/arch/arm/cpu/armv7/am33xx/mem.c
 Mark> +++ b/arch/arm/cpu/armv7/am33xx/mem.c
 Mark> @@ -83,7 +83,7 @@ void gpmc_init(void)
 Mark>  	/* global settings */
 Mark>  	writel(0x00000008, &gpmc_cfg->sysconfig);
 Mark>  	writel(0x00000100, &gpmc_cfg->irqstatus);
 Mark> -	writel(0x00000200, &gpmc_cfg->irqenable);
 Mark> +	writel(0x00000100, &gpmc_cfg->irqenable);

Acked-by: Peter Korsgaard <jacmet@sunsite.dk>

Why do we even enable the irq in the first place? The gpmc driver just
polls irqstatus anyway.

-- 
Bye, Peter Korsgaard

[U-Boot] Initialise correct GPMC WAITx irq for AM33xx

[Tom Rini]

On Thu, Feb 21, 2013 at 02:49:38AM -0000, Mark Jackson wrote:

> Currently WAIT0 irq is reset and then WAIT1 irq is enabled.
> Fix it such that WAIT0 irq is enabled instead.
> 
> Signed-off-by: Mark Jackson <mpfj@newflow.co.uk>
> Acked-by: Peter Korsgaard <jacmet@sunsite.dk>

Applied to u-boot-ti/master (and already pulled into u-boot-arm),
thanks!

-- 
Tom
-------------- next part --------------
A non-text attachment was scrubbed...
Name: not available
Type: application/pgp-signature
Size: 836 bytes
Desc: Digital signature
URL: <http://lists.denx.de/pipermail/u-boot/attachments/20130326/968f8a78/attachment.pgp>