[U-Boot] [PATCH 2/5] Tegra: MMC: Added/update SDMMC registers/base addresses for T20/T30

Stephen Warren
2013-02-26T23:15:36Z

On 02/26/2013 01:46 PM, Tom Warren wrote:
> Moved SDMMC base addresses into each SoC's main header, since they differ.
> Added pad control settings for T30 from the TRM, and added additional
> vendor-specific SD/MMC registers and bus power defines.

> diff --git a/arch/arm/include/asm/arch-tegra/tegra_mmc.h b/arch/arm/include/asm/arch-tegra/tegra_mmc.h

> -#define TEGRA_SDMMC1_BASE 0xC8000000
> -#define TEGRA_SDMMC2_BASE 0xC8000200
> -#define TEGRA_SDMMC3_BASE 0xC8000400
> -#define TEGRA_SDMMC4_BASE 0xC8000600

This is odd; are these values even used at all now that the registers
are described in device tree? Kinda the whole point of DT is that we
don't need to SoC-specific register addresses or board-specific data in
the code any more.