From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stephen Warren Date: Tue, 26 Feb 2013 16:15:36 -0700 Subject: [U-Boot] [PATCH 2/5] Tegra: MMC: Added/update SDMMC registers/base addresses for T20/T30 In-Reply-To: <1361911596-16518-3-git-send-email-twarren@nvidia.com> References: <1361911596-16518-1-git-send-email-twarren@nvidia.com> <1361911596-16518-3-git-send-email-twarren@nvidia.com> Message-ID: <512D4218.5030009@wwwdotorg.org> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 02/26/2013 01:46 PM, Tom Warren wrote: > Moved SDMMC base addresses into each SoC's main header, since they differ. > Added pad control settings for T30 from the TRM, and added additional > vendor-specific SD/MMC registers and bus power defines. > diff --git a/arch/arm/include/asm/arch-tegra/tegra_mmc.h b/arch/arm/include/asm/arch-tegra/tegra_mmc.h > -#define TEGRA_SDMMC1_BASE 0xC8000000 > -#define TEGRA_SDMMC2_BASE 0xC8000200 > -#define TEGRA_SDMMC3_BASE 0xC8000400 > -#define TEGRA_SDMMC4_BASE 0xC8000600 This is odd; are these values even used at all now that the registers are described in device tree? Kinda the whole point of DT is that we don't need to SoC-specific register addresses or board-specific data in the code any more.