From mboxrd@z Thu Jan  1 00:00:00 1970
From: Stephen Warren <swarren@wwwdotorg.org>
Date: Tue, 05 Mar 2013 10:48:51 -0700
Subject: [U-Boot] [PATCH 3/5] Tegra30: MMC: Add SD bus power-rail and
 SDMMC pad init routines
In-Reply-To: <CA+m5__K=XwivTWhG+hW7yz-XFDwC9ZfNUthc4H3ODwLnPWU1ZA@mail.gmail.com>
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On 03/05/2013 10:21 AM, Tom Warren wrote:
> On Tue, Mar 5, 2013 at 10:03 AM, Stephen Warren <swarren@wwwdotorg.org> wrote:
>> On 03/05/2013 08:28 AM, Tom Warren wrote:
>>> On Mon, Mar 4, 2013 at 5:28 PM, Stephen Warren <swarren@wwwdotorg.org> wrote:
>>>> On 03/04/2013 04:11 PM, Tom Warren wrote:
>>>>> On Wed, Feb 27, 2013 at 11:08 AM, Stephen Warren <swarren@wwwdotorg.org> wrote:
>>>>>> On 02/27/2013 09:59 AM, Tom Warren wrote:
>>>>>>> On Tue, Feb 26, 2013 at 4:26 PM, Stephen Warren <swarren@wwwdotorg.org> wrote:
>> ...
>>>>>> For the pinmux registers, I think they should be programmed by the
>>>>>> pinmux driver at the same time as the rest of the pinmux is programmed.
>>>>>
>>>>> Technically, they're not pinmux registers (PINMUX_AUX_ space), but GP
>>>>> regs (APB_MISC_GP_ space). Since the pinmux _code_ (no pinmux driver
>>>>> is used in Tegra U-Boot)

We're discussing struct apb_misc_gp_ctrl fields sdio1cfg and sdio3cfg,
right?

Those /are/ pinmux registers. The pinmux HW has two sets of registers
that feed into it; the pin mux selects (see 17.1.6 in the Tegra30 TRM)
and the pad control registers (see 17.1.4 in the Tegra30 TRM).

Both sets of registers should fully controlled by the pinmux driver, the
values/tables being provided by a board-specific file. Perhaps a common
table could be provided if all/many boards use the same value for some
settings, i.e. in pinmux_init():

pinmux_config_padctrl(tegra_padctrl_sdio1_common, ARRAY_SIZE(...));
pinmux_config_padctrl(tegra_padctrl_sdio3_common, ...);
pinmux_config_padctrl(tegra_padctrl_cardhu_specific, ...);

or:

pinmux_config_padctrl(cardhu_padctrl, ...);

... where cardhu_padctrl[] is probably defined in
pinmux-config-cardhu.h, and could use some centralized macros to create
the appropriate SDIO1CFG/... entries.