[U-Boot] [PATCH] Tegra30: Cardhu: Add pad config tables/code based on pinmux code

[Stephen Warren <swarren@wwwdotorg.org>]

On 03/06/2013 04:51 PM, Tom Warren wrote:
> Pad config registers exist in APB_MISC_GP space, and control slew
> rate, drive strengh, schmidt, high-speed, and low-power modes for
> all of the pingroups in Tegra30. This builds off of the pinmux
> way of constructing init tables to configure select pads (SDIOCFG,
> for instance) during pinmux_init().
> 
> Currently, only SDIO1CFG is changed as per the TRM to work with
> the SD-card slot on Cardhu.
> 
> Thanks to StephenW for the suggestion/original idea.

As a general rule, I'd expect the pinmux driver implementation to be a
separate patch from the changes to the Cardhu board file to use the new
features, but I guess you're replacing an existing
pinmux_sdio_pad_cfg(), so that isn't possible. So it's fine.

> diff --git a/board/nvidia/cardhu/pinmux-config-cardhu.h b/board/nvidia/cardhu/pinmux-config-cardhu.h

> +static struct padctrl_config cardhu_padctrl[] = {
> +	/* (_padgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) */
> +	DEFAULT_PADCFG(SDIO1, SDIOCFG_DRVUP_SLWF, SDIOCFG_DRVDN_SLWR, \
> +		SDIOCFG_DRVUP, SDIOCFG_DRVDN, NONE, DISABLE, DISABLE),
> +};
> +#endif	/* _PINMUX_CONFIG_CARDHU_H_ */

I didn't quite get why there wasn't an SDIO3 entry in that table, since
the original pinmux_sdio_pad_cfg() set up both SDIO1 and SDIO3 pin
groups, and SDIO3 appears to be used on Cardhu for SDIO-based WiFi.

Aside from that,
Reviewed-by: Stephen Warren <swarren@nvidia.com>