From: Stefano Babic <sbabic@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v2] mxs: spl_mem_init: Align DDR2 init with FSL bootlets source
Date: Wed, 13 Mar 2013 09:16:30 +0100 [thread overview]
Message-ID: <514035DE.5000006@denx.de> (raw)
In-Reply-To: <1362092359-16113-1-git-send-email-festevam@gmail.com>
On 28/02/2013 23:59, Fabio Estevam wrote:
> From: Fabio Estevam <fabio.estevam@freescale.com>
>
> Currently the following kernel hang happens when loading a 2.6.35 kernel from
> Freeescale on a mx28evk board:
>
> RPC: Registered tcp transport module.
> RPC: Registered tcp NFSv4.1 backchannel transport module.
> Bus freq driver module loaded
> IMX usb wakeup probe
> usb h1 wakeup device is registered
> mxs_cpu_init: cpufreq init finished
> ...
>
Hi all,
> Loading the same kernel using the bootlets from the imx-bootlets-src-10.12.01
> package, the hang does not occur.
>
> Comparing the DDR2 initialization from the bootlets code against the U-boot
> one, we can notice some mismatches, and after applying the same initialization
> into U-boot the 2.6.35 kernel can boot normally.
>
> Also tested with 'mtest' command, which runs succesfully.
>
> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
> ---
> Changes since v1:
> - Fix tabs/space confusion and only show the real context changes
> arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c | 18 +++++++++---------
> 1 file changed, 9 insertions(+), 9 deletions(-)
>
> diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
> index f8392f6..2195dce 100644
> --- a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
> +++ b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
> @@ -45,17 +45,17 @@ static uint32_t dram_vals[] = {
> 0x00000000, 0x00000000, 0x00010101, 0x01010101,
> 0x000f0f01, 0x0f02020a, 0x00000000, 0x00010101,
> 0x00000100, 0x00000100, 0x00000000, 0x00000002,
> - 0x01010000, 0x05060302, 0x06005003, 0x0a0000c8,
> - 0x02009c40, 0x0000030c, 0x0036a609, 0x031a0612,
> + 0x01010000, 0x07080403, 0x06005003, 0x0a0000c8,
> + 0x02009c40, 0x0002030c, 0x0036a609, 0x031a0612,
> 0x02030202, 0x00c8001c, 0x00000000, 0x00000000,
> 0x00012100, 0xffff0303, 0x00012100, 0xffff0303,
> 0x00012100, 0xffff0303, 0x00012100, 0xffff0303,
> 0x00000003, 0x00000000, 0x00000000, 0x00000000,
> 0x00000000, 0x00000000, 0x00000000, 0x00000000,
> 0x00000000, 0x00000000, 0x00000612, 0x01000F02,
> - 0x06120612, 0x00000200, 0x00020007, 0xf5014b27,
> - 0xf5014b27, 0xf5014b27, 0xf5014b27, 0x07000300,
> - 0x07000300, 0x07000300, 0x07000300, 0x00000006,
> + 0x06120612, 0x00000200, 0x00020007, 0xf4004a27,
> + 0xf4004a27, 0xf4004a27, 0xf4004a27, 0x07000300,
> + 0x07000300, 0x07400300, 0x07400300, 0x00000005,
> 0x00000000, 0x00000000, 0x01000000, 0x01020408,
> 0x08040201, 0x000f1133, 0x00000000, 0x00001f04,
> 0x00001f04, 0x00001f04, 0x00001f04, 0x00001f04,
> @@ -76,14 +76,14 @@ static uint32_t dram_vals[] = {
> 0x00000000, 0x00000000, 0x00000000, 0x00000000,
> 0x00000000, 0x00000000, 0x00000000, 0x00000000,
> 0x00000000, 0x00000000, 0x00000000, 0x00000000,
> - 0x00000000, 0x00000000, 0x00010000, 0x00020304,
> - 0x00000004, 0x00000000, 0x00000000, 0x00000000,
> + 0x00000000, 0x00000000, 0x00010000, 0x00030404,
> + 0x00000003, 0x00000000, 0x00000000, 0x00000000,
> 0x00000000, 0x00000000, 0x00000000, 0x01010000,
> 0x01000000, 0x03030000, 0x00010303, 0x01020202,
> 0x00000000, 0x02040303, 0x21002103, 0x00061200,
> - 0x06120612, 0x04320432, 0x04320432, 0x00040004,
> + 0x06120612, 0x04420442, 0x04420442, 0x00040004,
> 0x00040004, 0x00000000, 0x00000000, 0x00000000,
> - 0x00000000, 0x00010001
> + 0x00000000, 0xffffffff
>
> /*
> * i.MX23 DDR at 133MHz
>
Apart of the fact that fixes booting old kernel, these changes affects
all mx28 boards, not only mx28evk. Can we have a description about which
changes are done and why they are required ?
Else to be accepted we need at least a Tested-vy for all boards using it.
Regards,
Stefano
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next prev parent reply other threads:[~2013-03-13 8:16 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-02-28 22:59 [U-Boot] [PATCH v2] mxs: spl_mem_init: Align DDR2 init with FSL bootlets source Fabio Estevam
2013-03-06 13:44 ` Otavio Salvador
2013-03-06 14:31 ` Marek Vasut
2013-03-06 15:33 ` Otavio Salvador
2013-03-06 15:41 ` Marek Vasut
2013-03-06 15:44 ` Otavio Salvador
2013-03-06 15:46 ` Marek Vasut
2013-03-13 8:16 ` Stefano Babic [this message]
2013-03-13 14:18 ` Fabio Estevam
2013-03-13 14:22 ` Fabio Estevam
2013-03-14 5:09 ` Lauri Hintsala
2013-03-18 13:15 ` Otavio Salvador
2013-03-13 16:01 ` Marek Vasut
2013-03-13 16:07 ` Stefano Babic
2013-03-13 15:15 ` Marek Vasut
2013-03-19 6:52 ` Lauri Hintsala
2013-03-19 11:35 ` Otavio Salvador
2013-03-19 11:43 ` Lauri Hintsala
2013-03-23 16:56 ` Fabio Estevam
2013-03-19 12:36 ` Fabio Estevam
2013-03-20 5:17 ` Lauri Hintsala
2013-03-20 5:33 ` Fabio Estevam
2013-03-20 8:26 ` Stefano Babic
2013-03-20 10:07 ` Stefano Babic
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