From mboxrd@z Thu Jan 1 00:00:00 1970 From: Josh Wu Date: Wed, 20 Mar 2013 19:14:55 +0800 Subject: [U-Boot] [PATCH v2 3/4] arm: at91: add at91sam9n12ek board support In-Reply-To: <1363766145-4576-4-git-send-email-josh.wu@atmel.com> References: <1363766145-4576-1-git-send-email-josh.wu@atmel.com> <1363766145-4576-4-git-send-email-josh.wu@atmel.com> Message-ID: <51499A2F.1050202@atmel.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi, Andreas Sorry, the lcd initialization function still has wrong config. see my comment below. On 3/20/2013 3:55 PM, Josh Wu wrote: > Add support for following features: > - nand boot, with PMECC 2bit ECC for 512 bytes sector > - SPI flash boot > - SD card boot > - LCD support > > Signed-off-by: Josh Wu > --- > MAINTAINERS | 3 + > arch/arm/cpu/arm926ejs/at91/Makefile | 1 + > arch/arm/cpu/arm926ejs/at91/at91sam9n12_devices.c | 180 ++++++++++++++++ > arch/arm/cpu/arm926ejs/at91/clock.c | 4 +- > board/atmel/at91sam9n12ek/Makefile | 52 +++++ > board/atmel/at91sam9n12ek/at91sam9n12ek.c | 228 ++++++++++++++++++++ > boards.cfg | 3 + > include/configs/at91sam9n12ek.h | 232 +++++++++++++++++++++ > 8 files changed, 701 insertions(+), 2 deletions(-) > create mode 100644 arch/arm/cpu/arm926ejs/at91/at91sam9n12_devices.c > create mode 100644 board/atmel/at91sam9n12ek/Makefile > create mode 100644 board/atmel/at91sam9n12ek/at91sam9n12ek.c > create mode 100644 include/configs/at91sam9n12ek.h > > diff --git a/MAINTAINERS b/MAINTAINERS > index e792a8b..5ecb2f7 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -1007,6 +1007,9 @@ Richard Woodruff > > omap2420h4 ARM1136EJS > > +Josh Wu > + at91sam9n12ek ARM926EJS (AT91SAM9N12 SoC) > + > Ilya Yanok > > mcx ARM ARMV7 (AM35x SoC) > diff --git a/arch/arm/cpu/arm926ejs/at91/Makefile b/arch/arm/cpu/arm926ejs/at91/Makefile > index 346e58f..c4408f6 100644 > --- a/arch/arm/cpu/arm926ejs/at91/Makefile > +++ b/arch/arm/cpu/arm926ejs/at91/Makefile > @@ -35,6 +35,7 @@ COBJS-$(CONFIG_AT91SAM9263) += at91sam9263_devices.o > COBJS-$(CONFIG_AT91SAM9RL) += at91sam9rl_devices.o > COBJS-$(CONFIG_AT91SAM9M10G45) += at91sam9m10g45_devices.o > COBJS-$(CONFIG_AT91SAM9G45) += at91sam9m10g45_devices.o > +COBJS-$(CONFIG_AT91SAM9N12) += at91sam9n12_devices.o > COBJS-$(CONFIG_AT91SAM9X5) += at91sam9x5_devices.o > COBJS-$(CONFIG_AT91_EFLASH) += eflash.o > COBJS-$(CONFIG_AT91_LED) += led.o > diff --git a/arch/arm/cpu/arm926ejs/at91/at91sam9n12_devices.c b/arch/arm/cpu/arm926ejs/at91/at91sam9n12_devices.c > new file mode 100644 > index 0000000..2333031 > --- /dev/null > +++ b/arch/arm/cpu/arm926ejs/at91/at91sam9n12_devices.c [snip] > + > +#ifdef CONFIG_LCD > +void at91_lcd_hw_init(void) > +{ > + struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; > + > + at91_set_a_periph(AT91_PIO_PORTC, 24, 0); /* LCDDPWR */ > + at91_set_a_periph(AT91_PIO_PORTC, 26, 0); /* LCDVSYNC */ > + at91_set_a_periph(AT91_PIO_PORTC, 27, 0); /* LCDHSYNC */ > + at91_set_a_periph(AT91_PIO_PORTC, 28, 0); /* LCDDOTCK */ > + at91_set_a_periph(AT91_PIO_PORTC, 29, 0); /* LCDDEN */ > + at91_set_a_periph(AT91_PIO_PORTC, 30, 0); /* LCDDOTCK */ > + > + at91_set_a_periph(AT91_PIO_PORTC, 0, 0); /* LCDD0 */ > + at91_set_a_periph(AT91_PIO_PORTC, 1, 0); /* LCDD1 */ > + at91_set_a_periph(AT91_PIO_PORTC, 2, 0); /* LCDD2 */ > + at91_set_a_periph(AT91_PIO_PORTC, 3, 0); /* LCDD3 */ > + at91_set_a_periph(AT91_PIO_PORTC, 4, 0); /* LCDD4 */ > + at91_set_a_periph(AT91_PIO_PORTC, 5, 0); /* LCDD5 */ > + at91_set_a_periph(AT91_PIO_PORTC, 6, 0); /* LCDD6 */ > + at91_set_a_periph(AT91_PIO_PORTC, 7, 0); /* LCDD7 */ > + at91_set_a_periph(AT91_PIO_PORTC, 8, 0); /* LCDD8 */ > + at91_set_a_periph(AT91_PIO_PORTC, 9, 0); /* LCDD9 */ > + at91_set_a_periph(AT91_PIO_PORTC, 10, 0); /* LCDD10 */ > + at91_set_a_periph(AT91_PIO_PORTC, 11, 0); /* LCDD11 */ > + at91_set_a_periph(AT91_PIO_PORTC, 12, 0); /* LCDD12 */ > + at91_set_b_periph(AT91_PIO_PORTC, 13, 0); /* LCDD13 */ It should be: + at91_set_a_periph(AT91_PIO_PORTC, 13, 0); /* LCDD13 */ > + at91_set_a_periph(AT91_PIO_PORTC, 14, 0); /* LCDD14 */ > + at91_set_a_periph(AT91_PIO_PORTC, 15, 0); /* LCDD15 */ > + at91_set_a_periph(AT91_PIO_PORTC, 16, 0); /* LCDD16 */ > + at91_set_a_periph(AT91_PIO_PORTC, 17, 0); /* LCDD17 */ > + at91_set_a_periph(AT91_PIO_PORTC, 18, 0); /* LCDD18 */ > + at91_set_a_periph(AT91_PIO_PORTC, 19, 0); /* LCDD19 */ > + at91_set_a_periph(AT91_PIO_PORTC, 20, 0); /* LCDD20 */ > + at91_set_b_periph(AT91_PIO_PORTC, 21, 0); /* LCDD21 */ it should be + at91_set_a_periph(AT91_PIO_PORTC, 21, 0); /* LCDD21 */ I will resend this single patch again which includes above lcd pin fix. Best Regards, Josh Wu