public inbox for u-boot@lists.denx.de
 help / color / mirror / Atom feed
* [U-Boot] [PATCH] mx6: Fix the reading of CPU revision
@ 2013-03-26 12:54 Fabio Estevam
  2013-03-26 15:19 ` Eric Nelson
  2013-03-26 15:43 ` Dirk Behme
  0 siblings, 2 replies; 12+ messages in thread
From: Fabio Estevam @ 2013-03-26 12:54 UTC (permalink / raw)
  To: u-boot

Currently when booting a mx6 solo processor get_cpu_rev() returns 0x62xxx, which
is an invalid mx6 CPU revision. This causes run-time problems when trying to use
VPU library in the kernel, as this library loads the VPU firmware according
to the CPU type.

Fix get_cpu_rev() so that it correctly returns 0x61xxx for a mx6 solo.

While at it, also remove the duplicate definitions for MXC_CPU_ types.

Tested on a Wandboard solo and on a mx6qsabresd.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
---
 arch/arm/cpu/armv7/mx6/soc.c              |   28 ++++++++++++----------------
 arch/arm/imx-common/cpu.c                 |   16 ++++++++++------
 arch/arm/include/asm/arch-mx5/sys_proto.h |    7 -------
 arch/arm/include/asm/arch-mx6/sys_proto.h |    7 -------
 4 files changed, 22 insertions(+), 36 deletions(-)

diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index 193ba12..87725eb 100644
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -43,22 +43,18 @@ struct scu_regs {
 u32 get_cpu_rev(void)
 {
 	struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR;
-	u32 reg = readl(&anatop->digprog_sololite);
-	u32 type = ((reg >> 16) & 0xff);
-
-	if (type != MXC_CPU_MX6SL) {
-		reg = readl(&anatop->digprog);
-		type = ((reg >> 16) & 0xff);
-		if (type == MXC_CPU_MX6DL) {
-			struct scu_regs *scu = (struct scu_regs *)SCU_BASE_ADDR;
-			u32 cfg = readl(&scu->config) & 3;
-
-			if (!cfg)
-				type = MXC_CPU_MX6SOLO;
-		}
-	}
-	reg &= 0xff;		/* mx6 silicon revision */
-	return (type << 12) | (reg + 0x10);
+	u32 fsl_system_rev;
+	u32 cpu_rev = readl(&anatop->digprog);
+
+	/* Chip Silicon ID */
+	fsl_system_rev = ((cpu_rev >> 16) & 0xFF) << 12;
+	/* Chip silicon major revision */
+	fsl_system_rev |= ((cpu_rev >> 8) & 0xFF) << 4;
+	fsl_system_rev += 0x10;
+	/* Chip silicon minor revision */
+	fsl_system_rev |= cpu_rev & 0xFF;
+
+	return fsl_system_rev;
 }
 
 void init_aips(void)
diff --git a/arch/arm/imx-common/cpu.c b/arch/arm/imx-common/cpu.c
index a9b86c1..2f518c5 100644
--- a/arch/arm/imx-common/cpu.c
+++ b/arch/arm/imx-common/cpu.c
@@ -117,15 +117,19 @@ unsigned imx_ddr_size(void)
 
 #if defined(CONFIG_DISPLAY_CPUINFO)
 
+#define MXC_CPU_MX51		0x51
+#define MXC_CPU_MX53		0x53
+#define MXC_CPU_MX6SL		0x60
+#define MXC_CPU_MX6DL_S		0x61
+#define MXC_CPU_MX6Q_D		0x63
+
 const char *get_imx_type(u32 imxtype)
 {
 	switch (imxtype) {
-	case MXC_CPU_MX6Q:
-		return "6Q";	/* Quad-core version of the mx6 */
-	case MXC_CPU_MX6DL:
-		return "6DL";	/* Dual Lite version of the mx6 */
-	case MXC_CPU_MX6SOLO:
-		return "6SOLO";	/* Solo version of the mx6 */
+	case MXC_CPU_MX6Q_D:
+		return "6Q/D";	/* Quad/Dual version of the mx6 */
+	case MXC_CPU_MX6DL_S:
+		return "6DL/S";	/* Dual-Lite/Solo version of the mx6 */
 	case MXC_CPU_MX6SL:
 		return "6SL";	/* Solo-Lite version of the mx6 */
 	case MXC_CPU_MX51:
diff --git a/arch/arm/include/asm/arch-mx5/sys_proto.h b/arch/arm/include/asm/arch-mx5/sys_proto.h
index 93ad1c6..a2e88bb 100644
--- a/arch/arm/include/asm/arch-mx5/sys_proto.h
+++ b/arch/arm/include/asm/arch-mx5/sys_proto.h
@@ -24,13 +24,6 @@
 #ifndef _SYS_PROTO_H_
 #define _SYS_PROTO_H_
 
-#define MXC_CPU_MX51		0x51
-#define MXC_CPU_MX53		0x53
-#define MXC_CPU_MX6SL		0x60
-#define MXC_CPU_MX6DL		0x61
-#define MXC_CPU_MX6SOLO		0x62
-#define MXC_CPU_MX6Q		0x63
-
 #define is_soc_rev(rev)	((get_cpu_rev() & 0xFF) - rev)
 u32 get_cpu_rev(void);
 unsigned imx_ddr_size(void);
diff --git a/arch/arm/include/asm/arch-mx6/sys_proto.h b/arch/arm/include/asm/arch-mx6/sys_proto.h
index 3193297..0278317 100644
--- a/arch/arm/include/asm/arch-mx6/sys_proto.h
+++ b/arch/arm/include/asm/arch-mx6/sys_proto.h
@@ -24,13 +24,6 @@
 #ifndef _SYS_PROTO_H_
 #define _SYS_PROTO_H_
 
-#define MXC_CPU_MX51		0x51
-#define MXC_CPU_MX53		0x53
-#define MXC_CPU_MX6SL		0x60
-#define MXC_CPU_MX6DL		0x61
-#define MXC_CPU_MX6SOLO		0x62
-#define MXC_CPU_MX6Q		0x63
-
 #define is_soc_rev(rev)	((get_cpu_rev() & 0xFF) - rev)
 u32 get_cpu_rev(void);
 const char *get_imx_type(u32 imxtype);
-- 
1.7.9.5

^ permalink raw reply related	[flat|nested] 12+ messages in thread

end of thread, other threads:[~2013-03-27 15:30 UTC | newest]

Thread overview: 12+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2013-03-26 12:54 [U-Boot] [PATCH] mx6: Fix the reading of CPU revision Fabio Estevam
2013-03-26 15:19 ` Eric Nelson
2013-03-26 15:43 ` Dirk Behme
2013-03-26 17:04   ` Fabio Estevam
2013-03-27  8:02     ` Dirk Behme
2013-03-27  8:57       ` Dirk Behme
2013-03-27 13:37         ` Fabio Estevam
2013-03-27 13:51           ` Dirk Behme
2013-03-27 14:00           ` Eric Nelson
2013-03-27 15:06             ` Dirk Behme
2013-03-27 15:30               ` Eric Nelson
2013-03-27 13:25       ` Fabio Estevam

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox