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From: Minkyu Kang <mk7.kang@samsung.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 0/4 v8] Add ACE HW support for SHA256 and SHA1
Date: Fri, 29 Mar 2013 20:13:30 +0900	[thread overview]
Message-ID: <5155775A.8060303@samsung.com> (raw)
In-Reply-To: <1363849259-2007-1-git-send-email-akshay.s@samsung.com>

On 21/03/13 16:00, Akshay Saraswat wrote:
> This patch set adds hardware acceleration for SHA 256
> with the help of ACE.
> 
> Changes since v1:
> 	- Patch-1: Fixed few nits.
> 	- Patch-2: Removed not required config.
> 	- Patch-3: Added sha256 to hash command instead of new sha256 command.
> 
> Changes since v2:
>         - Patch-1: 
> 		- Added falling back to software sha256 in case length exceeds buffer limit.
> 		- Reduced one tab at lines 533, 559 and 571 in the patch.
> 		- Removed space after a cast at line 506 in the patch.
> 		- Removed blank line at line 561 in the patch.
> 		- Removed space before semicolon at line 576 in the patch.
>         - Patch-2: 
> 		- Added "SHA1" in the comment for config.
>         - Patch-3: 
> 		- Added new nodes for SHA1 and SHA256 in struct hash_algo for the case when
> 		  ACE is enabled.
> 		- Added new declaration for function pointer hash_func_ws with different
> 		  return type.
>         - Patch-4: 
> 		- New patch to enable config for hash command.
> 
> Changes since v3:
> 	- Patch-1:
> 		- Removed buffer limit since there are 2 regs for address hash_msg_size_high
> 		  and low.
> 		  That means buffer length could go upto 2^64 bits which is practically 
> 		- Removed falling back to software sha256 because there is no buffer limit.
> 		- Removed "/ 4" to sha1 and sha256 lengths and added increment to 4 in for
> 		  loop at line 573.
> 		- Timed out still kept to be 100 ms since this is enough for hardware to
> 		  switch status to idle from busy.
> 		  In case it couldn't that means h/w is faulty.
> 	- Patch-2:
> 		- Added "Acked-by: Simon Glass <sjg@chromium.org>".
> 	- Patch-3:
> 		- New patch.
> 	- Patch-4:
> 		- Changed command names to lower case in algo struct.
> 		- Added generic ace_sha config.
> 	- Patch-5: Added acked-by Simon Glass
> 		- Added new generic config for ace_sha to enable ace support in hash.c.
> 
> Changes since v4:
> 	- Patch-1:
> 		- Added include for clk.h.
> 		- Added define for MAX_FREQ.
> 		- Added timeout calculation as per frequency.
> 		- Changed "i+=4" to "i++" and "len" to "len/4" in for loop at line 591
> 		  in this patch.
> 		- Added two new functions ace_sha256 and ace_sha1.
> 	- Patch-2: None.
> 	- Patch-3:
> 		- Changed function names in struct algo.
> 		- Replaced ACE_SHA_TYPE to CHUNSZ in struct algo.
> 	- Patch-4: Added "Acked-by: Simon Glass <sjg@chromium.org>".
> 
> Changes since v5:
> 	- Patch-1:
> 		- Removed ace_sha.h.
> 		- Renamed ace_sfr.h as ace_sha.h.
> 		- Removed timeout and checking for PRNG_ERROR bit in HASH_STATUS register.
> 		  PRNG_ERROR bit high means setup was not done properly. Since there is no
> 		  way to detect faulty h/w, we consider the possible fact that h/w should
> 		  not be able to setup feed properly if it's faulty.
> 		- Renamed function name ace_sha256 to hw_sha256 and ace_sha1 to hw_sha1.
> 	- Patch-2: None.
> 	- Patch-3:
> 		- Added file hw_sha.h.
> 		- Changed CONFIG_ACE_SHA to CONFIG_SHA_HW_ACCEL.
> 		- Renamed function names ace_sha1 and ace_sha256 to hw_sha1 and hw_sha256
> 		  respectively.
> 	- Patch-4:
> 		- Removed "Acked-by: Simon Glass <sjg@chromium.org>" because of a change.
> 		- Changed CONFIG_ACE_SHA to CONFIG_SHA_HW_ACCEL.
> 
> Changes since v6:
> 	- Patch-1: Added "Acked-by: Simon Glass <sjg@chromium.org>".
> 	- Patch-2: None.
> 	- Patch-3:
> 		- Changed position of "hw_sha.h" among includes (alpha order).
> 		- Rebased patch.
> 	- Patch-4: Added "Acked-by: Simon Glass <sjg@chromium.org>".
> 
> Changes since v7:
> 	- Patch-1:
> 		- Moved ace_sha.h to drivers/crypto.
> 		- Removed parantheses where not required in ace_sha.h.
> 		- Removed leftover time limit comment in ace_sha.c.
> 		- Replaced "break" with "return -EBUSY" in PRNGERROR check.
> 	- Patch-2: None.
> 	- Patch-3: Added "Acked-by: Simon Glass <sjg@chromium.org>".
> 	- Patch-4: None.
> 
> Akshay Saraswat (4):
>   Exynos: Add hardware accelerated SHA256 and SHA1
>   Exynos: config: Enable ACE HW for SHA 256 for Exynos
>   gen: Add sha h/w acceleration to hash
>   Exynos: config: Enable hash command
> 
>  Makefile                               |   1 +
>  arch/arm/include/asm/arch-exynos/cpu.h |   4 +
>  common/hash.c                          |  18 ++
>  drivers/crypto/Makefile                |  47 +++++
>  drivers/crypto/ace_sha.c               | 126 +++++++++++++
>  drivers/crypto/ace_sha.h               | 325 +++++++++++++++++++++++++++++++++
>  include/configs/exynos5250-dt.h        |   5 +
>  include/hw_sha.h                       |  50 +++++
>  8 files changed, 576 insertions(+)
>  create mode 100644 drivers/crypto/Makefile
>  create mode 100644 drivers/crypto/ace_sha.c
>  create mode 100644 drivers/crypto/ace_sha.h
>  create mode 100644 include/hw_sha.h
> 

applied to u-boot-samsung.

Thanks,
Minkyu Kang.

      parent reply	other threads:[~2013-03-29 11:13 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-03-21  7:00 [U-Boot] [PATCH 0/4 v8] Add ACE HW support for SHA256 and SHA1 Akshay Saraswat
2013-03-21  7:00 ` [U-Boot] [PATCH 1/4 v8] Exynos: Add hardware accelerated " Akshay Saraswat
2013-03-21  7:00 ` [U-Boot] [PATCH 2/4 v8] Exynos: config: Enable ACE HW for SHA 256 for Exynos Akshay Saraswat
2013-03-21  7:00 ` [U-Boot] [PATCH 3/4 v8] gen: Add sha h/w acceleration to hash Akshay Saraswat
2013-03-21  7:00 ` [U-Boot] [PATCH 4/4 v8] Exynos: config: Enable hash command Akshay Saraswat
2013-03-29 11:13 ` Minkyu Kang [this message]

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