From mboxrd@z Thu Jan 1 00:00:00 1970 From: Dirk Behme Date: Tue, 02 Apr 2013 20:10:47 +0200 Subject: [U-Boot] [PATCH] mx6: fsl_esdhc: Fix waiting for DMA operation completion In-Reply-To: <515AFE1E.801@boundarydevices.com> References: <1364897095-28227-1-git-send-email-andrew_gabbasov@mentor.com> <515AFE1E.801@boundarydevices.com> Message-ID: <515B1F27.4010702@gmail.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Am 02.04.2013 17:49, schrieb Eric Nelson: > Thanks Andrew, > > On 04/02/2013 03:04 AM, Andrew Gabbasov wrote: >> On iMX6 sometimes the Transfer Complete interrupt occurs earlier >> than the DMA part completes its operation. If immediately after that >> the read data is used for some data verification, those obtained data >> may be incomplete, which causes intermittent verification failures. >> > > Can you describe how to repeat this? > >> For example, when the default environment command tries to load and run >> boot script from FAT partition on SD/MMC card, it sometimes fails, >> reporting invalid partition table, or unknown partition type, or >> something else of that kind. Such errors disappear if the build >> configuration has CONFIG_SYS_FSL_ESDHC_USE_PIO, or if some delay >> is added after transfer completion. >> > We do this on every boot on SABRE Lite and Nitrogen6x boards, > and haven't seen an issue. > > What board are you testing on? > > Do you have cache enabled? > > Is this with an SD card or eMMC? Andrew will have the details, but to my understanding this implements in U-Boot what the Freescale kernel has in http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/tree/drivers/mmc/host/sdhci-esdhc-imx.c?h=imx_3.0.35_12.09.01#n234 for TO 1.0. Best regards Dirk >> Adding extra waiting for DMA completion after Transfer Complete >> event fixes this issue. >> >> Signed-off-by: Andrew Gabbasov >> --- >> drivers/mmc/fsl_esdhc.c | 6 ++++++ >> 1 file changed, 6 insertions(+) >> >> diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c >> index d2a505e..806c6dd 100644 >> --- a/drivers/mmc/fsl_esdhc.c >> +++ b/drivers/mmc/fsl_esdhc.c >> @@ -402,6 +402,12 @@ esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd >> *cmd, struct mmc_data *data) >> return COMM_ERR; >> } while (!(irqstat & IRQSTAT_TC) && >> (esdhc_read32(®s->prsstat) & PRSSTAT_DLA)); >> +#ifdef CONFIG_MX6 >> + /* In imx6 TC (data end) interrupt sometimes occur earlier >> + than DMA completes. In this case just wait a little >> more. */ >> + while (!(irqstat & (IRQSTAT_DINT | IRQSTAT_DMAE))) >> + irqstat = esdhc_read32(®s->irqstat); >> +#endif >> #endif >> } >> >> > > _______________________________________________ > U-Boot mailing list > U-Boot at lists.denx.de > http://lists.denx.de/mailman/listinfo/u-boot >