From mboxrd@z Thu Jan  1 00:00:00 1970
From: Stephen Warren <swarren@wwwdotorg.org>
Date: Wed, 03 Apr 2013 17:28:00 -0600
Subject: [U-Boot] [PATCH] Tegra: Fix MSELECT clock divisors for T30/T114.
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References: <1365031032-12739-1-git-send-email-twarren@nvidia.com>
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On 04/03/2013 05:17 PM, Tom Warren wrote:
> A comparison of registers between our internal NV U-Boot and
> u-boot-tegra/next showed some discrepancies in the MSELECT
> clock divisor programming. T20 doesn't have a MSELECT clk src reg.

I'm not familiar with this code/HW, but it seems OK at a quick glance, so,
Reviewed-by: Stephen Warren <swarren@nvidia.com>