From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stefan Roese Date: Fri, 05 Apr 2013 08:04:54 +0200 Subject: [U-Boot] PPC4XX Custom Board - Failing to read I2C In-Reply-To: <1365120299377-151609.post@n7.nabble.com> References: <1364939304023-151298.post@n7.nabble.com> <1365120299377-151609.post@n7.nabble.com> Message-ID: <515E6986.4050905@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 05.04.2013 02:04, txcotrader wrote: > After looking deeper I've found a difference in register values when > performing drivers/i2c/ppc4xx_i2c.c->i2c_transfer function. > > v1.7.02 code yields: > > /* Transfer is in progress > * we have to wait for upto 5 bytes of data > * 1 byte chip address+r/w bit then bc bytes > * of data. > * udelay(10) is 1 bit time at 100khz > * Doubled for slop. 20 is too small. > */ > i = 2*5*8; > do { > /* Get status */ > status = in_8((u8 *)IIC_STS); > printf("gd_ do status->i = %d, status = %d\n", i, status); > udelay(20); > i--; > } while ((status & IIC_STS_PT) && !(status & IIC_STS_ERR) && (i > > 0)); > > gd_ do status->i = 80, status = 40 > > > v2013.01.01 Yields: > i = 2 * 5 * 8; > do { > /* Get status */ > status = in_8(&i2c->sts); > printf("gd_ do status->i = %d, status = %d\n", i, status); > udelay(10); > i--; > } while ((status & IIC_STS_PT) && !(status & IIC_STS_ERR) && > (i > 0)); > > gd_ do status->i = 80, status = 40 > > v1.7.02 - include/4xx_i2c.h:#define IIC_STS > (I2C_REGISTERS_BASE_ADDRESS+IICSTS) > v2013.01.01 - struct ppc4xx_i2c *i2c = (struct ppc4xx_i2c *)I2C_BASE_ADDR; > > Newb question, but I should be able to add an offset to correct this issue > right? The resulting addresses should be the same. The old version uses the offset via a define and the new one the (recommended) struct access to the register. I suggest you print the resulting address to verify that it really is the same. Thanks, Stefan