[U-Boot] [PATCH 4/4] mtd: mxs_nand: Add support for i.MX6

Stefan Roese
2013-04-10T07:06:10Z

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Scott Wood <scottwood@freescale.com>
---
arch/arm/cpu/armv7/mx6/soc.c | 7 +++++++
arch/arm/include/asm/imx-common/regs-bch.h | 10 ++++++++++
drivers/mtd/nand/mxs_nand.c | 11 +++++++++--
3 files changed, 26 insertions(+), 2 deletions(-)

diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index 193ba12..7596526 100644
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -30,6 +30,7 @@
#include <asm/arch/clock.h>
#include <asm/arch/sys_proto.h>
#include <asm/imx-common/boot_mode.h>
+#include <asm/imx-common/dma.h>
#include <stdbool.h>

struct scu_regs {
@@ -139,6 +140,12 @@ int arch_cpu_init(void)
set_vddsoc(1200); /* Set VDDSOC to 1.2V */

imx_set_wdog_powerdown(false); /* Disable PDE bit of WMCR register */
+
+#ifdef CONFIG_APBH_DMA
+ /* Start APBH DMA */
+ mxs_dma_init();
+#endif
+
return 0;
}

diff --git a/arch/arm/include/asm/imx-common/regs-bch.h b/arch/arm/include/asm/imx-common/regs-bch.h
index 3a73de4..dbe7ac8 100644
--- a/arch/arm/include/asm/imx-common/regs-bch.h
+++ b/arch/arm/include/asm/imx-common/regs-bch.h
@@ -136,8 +136,13 @@ struct mxs_bch_regs {
#define BCH_FLASHLAYOUT0_NBLOCKS_OFFSET 24
#define BCH_FLASHLAYOUT0_META_SIZE_MASK (0xff << 16)
#define BCH_FLASHLAYOUT0_META_SIZE_OFFSET 16
+#if defined(CONFIG_MX6)
+#define BCH_FLASHLAYOUT0_ECC0_MASK (0x1f << 11)
+#define BCH_FLASHLAYOUT0_ECC0_OFFSET 11
+#else
#define BCH_FLASHLAYOUT0_ECC0_MASK (0xf << 12)
#define BCH_FLASHLAYOUT0_ECC0_OFFSET 12
+#endif
#define BCH_FLASHLAYOUT0_ECC0_NONE (0x0 << 12)
#define BCH_FLASHLAYOUT0_ECC0_ECC2 (0x1 << 12)
#define BCH_FLASHLAYOUT0_ECC0_ECC4 (0x2 << 12)
@@ -161,8 +166,13 @@ struct mxs_bch_regs {

#define BCH_FLASHLAYOUT1_PAGE_SIZE_MASK (0xffff << 16)
#define BCH_FLASHLAYOUT1_PAGE_SIZE_OFFSET 16
+#if defined(CONFIG_MX6)
+#define BCH_FLASHLAYOUT1_ECCN_MASK (0x1f << 11)
+#define BCH_FLASHLAYOUT1_ECCN_OFFSET 11
+#else
#define BCH_FLASHLAYOUT1_ECCN_MASK (0xf << 12)
#define BCH_FLASHLAYOUT1_ECCN_OFFSET 12
+#endif
#define BCH_FLASHLAYOUT1_ECCN_NONE (0x0 << 12)
#define BCH_FLASHLAYOUT1_ECCN_ECC2 (0x1 << 12)
#define BCH_FLASHLAYOUT1_ECCN_ECC4 (0x2 << 12)
diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/mxs_nand.c
index c21fd69..398e4dd 100644
--- a/drivers/mtd/nand/mxs_nand.c
+++ b/drivers/mtd/nand/mxs_nand.c
@@ -42,6 +42,11 @@
#define MXS_NAND_DMA_DESCRIPTOR_COUNT 4

#define MXS_NAND_CHUNK_DATA_CHUNK_SIZE 512
+#if defined(CONFIG_MX6)
+#define MXS_NAND_CHUNK_DATA_CHUNK_SIZE_SHIFT 2
+#else
+#define MXS_NAND_CHUNK_DATA_CHUNK_SIZE_SHIFT 0
+#endif
#define MXS_NAND_METADATA_SIZE 10

#define MXS_NAND_COMMAND_BUFFER_SIZE 32
@@ -982,14 +987,16 @@ static int mxs_nand_scan_bbt(struct mtd_info *mtd)
tmp |= MXS_NAND_METADATA_SIZE << BCH_FLASHLAYOUT0_META_SIZE_OFFSET;
tmp |= (mxs_nand_get_ecc_strength(mtd->writesize, mtd->oobsize) >> 1)
<< BCH_FLASHLAYOUT0_ECC0_OFFSET;
- tmp |= MXS_NAND_CHUNK_DATA_CHUNK_SIZE;
+ tmp |= MXS_NAND_CHUNK_DATA_CHUNK_SIZE
+ >> MXS_NAND_CHUNK_DATA_CHUNK_SIZE_SHIFT;
writel(tmp, &bch_regs->hw_bch_flash0layout0);

tmp = (mtd->writesize + mtd->oobsize)
<< BCH_FLASHLAYOUT1_PAGE_SIZE_OFFSET;
tmp |= (mxs_nand_get_ecc_strength(mtd->writesize, mtd->oobsize) >> 1)
<< BCH_FLASHLAYOUT1_ECCN_OFFSET;
- tmp |= MXS_NAND_CHUNK_DATA_CHUNK_SIZE;
+ tmp |= MXS_NAND_CHUNK_DATA_CHUNK_SIZE
+ >> MXS_NAND_CHUNK_DATA_CHUNK_SIZE_SHIFT;
writel(tmp, &bch_regs->hw_bch_flash0layout1);

/* Set *all* chip selects to use layout 0 */
--
1.8.2.1