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From: Stefano Babic <sbabic@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [Patch] fsl_esdhc: Fix DMA transfer completion waiting loop
Date: Sun, 14 Apr 2013 11:25:36 +0200	[thread overview]
Message-ID: <516A7610.8000006@denx.de> (raw)
In-Reply-To: <516A589E.4020907@gmail.com>

On 14/04/2013 09:19, Dirk Behme wrote:
> Am 08.04.2013 11:06, schrieb Andrew Gabbasov:
>> Rework the waiting for transfer completion loop condition
>> to continue waiting until both Transfer Complete and DMA End
>> interrupts occur. Checking of DLA bit in Present State register
>> looks not needed in addition to interrupts status checking,
>> so it can be removed from the condition. Also, DMA Error
>> condition is added to the list of data errors, checked in the loop.
>>
>> Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
>> ---
>>   drivers/mmc/fsl_esdhc.c |    3 +--
>>   include/fsl_esdhc.h     |    4 +++-
>>   2 files changed, 4 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
>> index 54b5363..814bba4 100644
>> --- a/drivers/mmc/fsl_esdhc.c
>> +++ b/drivers/mmc/fsl_esdhc.c
>> @@ -400,8 +400,7 @@ esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd
>> *cmd, struct mmc_data *data)
>>
>>               if (irqstat & DATA_ERR)
>>                   return COMM_ERR;
>> -        } while (!(irqstat & IRQSTAT_TC) &&
>> -                (esdhc_read32(&regs->prsstat) & PRSSTAT_DLA));
>> +        } while ((irqstat & DATA_COMPLETE) != DATA_COMPLETE);
>>   #endif
>>       }
>>
>> diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h
>> index 47d2fe4..ea0880b 100644
>> --- a/include/fsl_esdhc.h
>> +++ b/include/fsl_esdhc.h
>> @@ -63,7 +63,9 @@
>>   #define IRQSTAT_CC        (0x00000001)
>>
>>   #define CMD_ERR        (IRQSTAT_CIE | IRQSTAT_CEBE | IRQSTAT_CCE)
>> -#define DATA_ERR    (IRQSTAT_DEBE | IRQSTAT_DCE | IRQSTAT_DTOE)
>> +#define DATA_ERR    (IRQSTAT_DEBE | IRQSTAT_DCE | IRQSTAT_DTOE | \
>> +                IRQSTAT_DMAE)
>> +#define DATA_COMPLETE    (IRQSTAT_TC | IRQSTAT_DINT)
>>
>>   #define IRQSTATEN        0x0002e034
>>   #define IRQSTATEN_DMAE        (0x10000000)
> 
> I can't say anything to the content of the patches ;)
> 
> But are this patch and the patch from Eric
> 
> http://patchwork.ozlabs.org/patch/233595/
> 
> fine and should be applied together, now?

I see the same. I apply both on u-boot-imx and send an update pull
request to Albert.

Best regards,
Stefano

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  reply	other threads:[~2013-04-14  9:25 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-04-08  9:06 [U-Boot] [Patch] fsl_esdhc: Fix DMA transfer completion waiting loop Andrew Gabbasov
2013-04-14  7:19 ` Dirk Behme
2013-04-14  9:25   ` Stefano Babic [this message]
2013-06-10 12:06 ` Dirk Behme
2013-06-10 14:51   ` Gabbasov, Andrew
2013-06-11  8:16     ` Dirk Behme
2013-06-11 15:24       ` Gabbasov, Andrew
2013-06-11 15:34         ` [U-Boot] [PATCH] fsl_esdhc: Do not clear interrupt status bits until data processed Andrew Gabbasov
2013-06-12  5:16           ` Dirk Behme
2013-06-14 18:55           ` [U-Boot] " Andy Fleming

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