From: Bo Shen <voice.shen@atmel.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] phy ic isn't reset
Date: Thu, 18 Apr 2013 16:07:15 +0800 [thread overview]
Message-ID: <516FA9B3.20303@atmel.com> (raw)
In-Reply-To: <516FA5C4.6060105@gmail.com>
Hi Andreas,
On 4/18/2013 15:50, Andreas Bie?mann wrote:
> Dear Bo Shen,
>
> On 04/18/2013 08:32 AM, Bo Shen wrote:
>> Hi Alex
>>
>> On 4/18/2013 13:27, alex wrote:
>>>
>>> At 2013-04-18 09:23:48,"Bo Shen" <voice.shen@atmel.com> wrote:
>>>> Hi Alex,
>>>>
>>>> On 4/17/2013 18:29, alex wrote:
>>>>> Hi:
>>>>> I work on one board based on at9g25evk board now. I find one issue
>>>>> that phy IC isn't reset, so network can't work. Only the different
>>>>> crystal with evk board is connected to PHY IC. I copy the phy-reset
>>>>> part
>>>>> of at9260 to at9g25. It can work now. Please the maintainer of at9gx5
>>>>> check this. The modification I do is as below:
>>>>
>>>> As you mentioned, you use different crystal, please specify this in
>>>> detail.
>>>
>>> S3225A package, 50Mhz crystal oscillator. ocean comonents ltd. --->
>>> can work.
>>>
>>> asem series:ASEM1-50.000MHZ-LC-T ---->can't work.
>>>
>>>>
>>>>> +
>>>>> +#ifdef CONFIG_MACB
>>>>> +int at91sam9x5ek_macb_hw_init(void)
>>>>> +{
>>>>> + struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
>>>>> + struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA;
>>>>> + struct at91_rstc *rstc = (struct at91_rstc *)ATMEL_BASE_RSTC;
>>>>> + unsigned long erstl;
>>>>> +
>>>>> + /* Enable EMAC clock */
>>>>> + writel(1 << ATMEL_ID_EMAC0, &pmc->pcer);
>>>>> +
>>>>> + erstl = readl(&rstc->mr) & AT91_RSTC_MR_ERSTL_MASK;
>>>>> +
>>>>> + /* Need to reset PHY -> 500ms reset */
>>>>> + writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(13) |
>>>>> + AT91_RSTC_MR_URSTEN, &rstc->mr);
>>>>> +
>>>>> + writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, &rstc->cr);
>>>>> +
>>>>> + /* Wait for end hardware reset */
>>>>> + while (!(readl(&rstc->sr) & AT91_RSTC_SR_NRSTL))
>>>>> + ;
>>>>> +
>>>>> + /* Restore NRST value */
>>>>> + writel(AT91_RSTC_KEY | erstl | AT91_RSTC_MR_URSTEN,
>>>>> + &rstc->mr);
>>>>> +
>>>>> + at91_macb_hw_init();
>>>>> +}
>>>>> +#endif
>>>>
>>>> On at91sam9g25ek, it don't need this patch. The network work properly.
>>>>
>>>> Btw, please help provide the log information for why not ethernet
>>>> doesn't work.
>>>
>>> From at91sam9g25ek side, no any error. If you only plug network line
>>> , the network traffic led is always off, that is,DM9161AEP doesn't
>>> check this change.
>>> Even if I add this patch, no any defect, right?
>>
>> I won't suggest do like this, if you use reset controller, it will
>> assert nRST pin. If one more device use nRST, it will also reset other
>> device. if only PHY use nRST and no other consideration, I think it is OK.
>
> I would like to point out that older atmel eval kits use this trick
> heavily. This is due to missing pullup/pulldown on the board, therefore
> it is required to setup some gpio first and then issue a reset (again)
> to the PHY cause it is misconfigured. Maybe this can also be esablished
> with some (R)MII communication, but thats how it is implemented currently.
Thanks for this information.
> Regarding the crystal, what is the root cause of your issue? Does it not
> oscillate or is your PHY 'mis-configured' in means of wrong initial
> setup on configuration lines?
> In both cases I recommend to find a HW solution for the final product.
Hi Alex,
Please check your issue according to Andreas' suggestion. And try to
fix it through HW solution.
Best Regards,
Bo Shen
> Best regards
>
> Andreas Bie?mann
>
prev parent reply other threads:[~2013-04-18 8:07 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-04-17 10:29 [U-Boot] phy ic isn't reset alex
2013-04-18 1:23 ` Bo Shen
2013-04-18 5:27 ` alex
2013-04-18 6:32 ` Bo Shen
2013-04-18 7:07 ` alex
2013-04-18 7:50 ` Andreas Bießmann
2013-04-18 8:07 ` Bo Shen [this message]
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