[U-Boot] [RFC PATCH 0/1] GPIO support for Microblaze

[U-Boot] [RFC PATCH 0/1] GPIO support for Microblaze

[Michal Simek]

I want to also write gpio support for Zynq
and this driver should be also used for arm zynq.

Currently we have support just for only gpio controller
but not for various of them.
That's why I would like to get some input from you
if possible to add dynamic gpio allocation which
could be also helpful for OF support.

Output from my gpio status on Microblaze is below.

Thanks,
Michal

U-Boot> gpio status

gpio_info: reset/40000000 (0-0)
GPIO_0:	reset_pin is an INPUT value = 0

gpio_info: led/40040000 (1-5)
GPIO_1:	UNKNOWN is an INPUT value = 0
GPIO_2:	UNKNOWN is an OUTPUT value = 1
GPIO_3:	UNKNOWN is an INPUT value = 0
GPIO_4:	UNKNOWN is an INPUT value = 0
GPIO_5:	UNKNOWN is an OUTPUT value = 0


Michal Simek (1):
  gpio: Add support for microblaze xilinx GPIO

 arch/microblaze/include/asm/gpio.h                 |  50 +---
 .../xilinx/microblaze-generic/microblaze-generic.c |  17 +-
 drivers/gpio/Makefile                              |   1 +
 drivers/gpio/xilinx_gpio.c                         | 323 +++++++++++++++++++++
 include/configs/microblaze-generic.h               |   3 +-
 5 files changed, 353 insertions(+), 41 deletions(-)
 create mode 100644 drivers/gpio/xilinx_gpio.c

--
1.8.2.1

-------------- next part --------------
A non-text attachment was scrubbed...
Name: not available
Type: application/pgp-signature
Size: 198 bytes
Desc: not available
URL: <http://lists.denx.de/pipermail/u-boot/attachments/20130424/f2236e57/attachment.pgp>

[U-Boot] [RFC PATCH] gpio: Add support for microblaze xilinx GPIO

[Michal Simek]

Microblaze uses gpio which is connected to the system reset.
Currently gpio subsystem wasn't used for it.

Add gpio driver and change Microblaze reset logic to be done
via gpio subsystem.

There are various configurations which Microblaze can have
that's why gpio_alloc/gpio_alloc_dual(for dual channel)
function has been introduced and gpio can be allocated
dynamically.

Adding several gpios IP is also possible and supported.

For listing gpio configuration please use "gpio status" command

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
 arch/microblaze/include/asm/gpio.h                 |  50 +---
 .../xilinx/microblaze-generic/microblaze-generic.c |  17 +-
 drivers/gpio/Makefile                              |   1 +
 drivers/gpio/xilinx_gpio.c                         | 323 +++++++++++++++++++++
 include/configs/microblaze-generic.h               |   3 +-
 5 files changed, 353 insertions(+), 41 deletions(-)
 create mode 100644 drivers/gpio/xilinx_gpio.c

diff --git a/arch/microblaze/include/asm/gpio.h b/arch/microblaze/include/asm/gpio.h
index 883f4d4..69df8c5 100644
--- a/arch/microblaze/include/asm/gpio.h
+++ b/arch/microblaze/include/asm/gpio.h
@@ -1,41 +1,21 @@
 #ifndef _ASM_MICROBLAZE_GPIO_H_
 #define _ASM_MICROBLAZE_GPIO_H_

-#include <asm/io.h>
+/* Allocation functions */
+extern int gpio_alloc_dual(u32 baseaddr, const char *name, u32 gpio_no0,
+			   u32 gpio_no1);
+extern int gpio_alloc(u32 baseaddr, const char *name, u32 gpio_no);
+
+/* Standard functions */
+extern int gpio_request(unsigned gpio, const char *label);
+extern int gpio_free(unsigned gpio);
+extern int gpio_direction_input(unsigned gpio);
+extern int gpio_direction_output(unsigned gpio, int value);
+extern int gpio_get_value(unsigned gpio);
+extern int gpio_set_value(unsigned gpio, int value);
+extern int gpio_is_valid(int number);
+#define gpio_status()	gpio_info()
+extern void gpio_info(void);

-static inline int gpio_request(unsigned gpio, const char *label)
-{
-	return 0;
-}
-
-static inline int gpio_free(unsigned gpio)
-{
-	return 0;
-}
-
-static inline int gpio_direction_input(unsigned gpio)
-{
-	return 0;
-}
-
-static inline int gpio_direction_output(unsigned gpio, int value)
-{
-	return 0;
-}
-
-static inline int gpio_get_value(unsigned gpio)
-{
-	return 0;
-}
-
-static inline int gpio_set_value(unsigned gpio, int value)
-{
-	return 0;
-}
-
-static inline int gpio_is_valid(int number)
-{
-	return 0;
-}
 #endif

diff --git a/board/xilinx/microblaze-generic/microblaze-generic.c b/board/xilinx/microblaze-generic/microblaze-generic.c
index befbb3a..2f5f20e 100644
--- a/board/xilinx/microblaze-generic/microblaze-generic.c
+++ b/board/xilinx/microblaze-generic/microblaze-generic.c
@@ -31,12 +31,17 @@
 #include <asm/processor.h>
 #include <asm/microblaze_intc.h>
 #include <asm/asm.h>
+#include <asm/gpio.h>
+
+#ifdef CONFIG_XILINX_GPIO
+static int reset_pin = -1;
+#endif

 int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
-#ifdef CONFIG_SYS_GPIO_0
-	*((unsigned long *)(CONFIG_SYS_GPIO_0_ADDR)) =
-	    ++(*((unsigned long *)(CONFIG_SYS_GPIO_0_ADDR)));
+#ifdef CONFIG_XILINX_GPIO
+	if (reset_pin != -1)
+		gpio_direction_output(reset_pin, 1);
 #endif

 #ifdef CONFIG_XILINX_TB_WATCHDOG
@@ -52,8 +57,10 @@ int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])

 int gpio_init (void)
 {
-#ifdef CONFIG_SYS_GPIO_0
-	*((unsigned long *)(CONFIG_SYS_GPIO_0_ADDR)) = 0xFFFFFFFF;
+#ifdef CONFIG_XILINX_GPIO
+	reset_pin = gpio_alloc(CONFIG_SYS_GPIO_0_ADDR, "reset", 1);
+	if (reset_pin != -1)
+		gpio_request(reset_pin, "reset_pin");
 #endif
 	return 0;
 }
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 9df1e26..830e8e6 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -47,6 +47,7 @@ COBJS-$(CONFIG_OMAP_GPIO)	+= omap_gpio.o
 COBJS-$(CONFIG_DB8500_GPIO)	+= db8500_gpio.o
 COBJS-$(CONFIG_BCM2835_GPIO)	+= bcm2835_gpio.o
 COBJS-$(CONFIG_S3C2440_GPIO)	+= s3c2440_gpio.o
+COBJS-$(CONFIG_XILINX_GPIO)	+= xilinx_gpio.o

 COBJS	:= $(COBJS-y)
 SRCS 	:= $(COBJS:.o=.c)
diff --git a/drivers/gpio/xilinx_gpio.c b/drivers/gpio/xilinx_gpio.c
new file mode 100644
index 0000000..f2c289f
--- /dev/null
+++ b/drivers/gpio/xilinx_gpio.c
@@ -0,0 +1,323 @@
+/*
+ * Copyright (c) 2013 Xilinx, Michal Simek
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <errno.h>
+#include <malloc.h>
+#include <linux/list.h>
+#include <asm/io.h>
+#include <asm/gpio.h>
+
+static LIST_HEAD(gpio_list);
+
+enum gpio_direction {
+	GPIO_DIRECTION_OUT = 0,
+	GPIO_DIRECTION_IN = 1,
+};
+
+/* Gpio simple map */
+struct gpio_regs {
+	u32 gpiodata;
+	u32 gpiodir;
+};
+
+#define GPIO_NAME_SIZE	10
+
+struct gpio_names {
+	char name[GPIO_NAME_SIZE];
+};
+
+/* Initialized, rxbd_current, rx_first_buf must be 0 after init */
+struct xilinx_gpio_priv {
+	struct gpio_regs *regs;
+	u32 gpio_min;
+	u32 gpio_max;
+	u32 gpiodata_store;
+	char name[GPIO_NAME_SIZE];
+	struct list_head list;
+	struct gpio_names *gpio_name;
+};
+
+/* Store number of allocated gpio pins */
+static u32 xilinx_gpio_max;
+
+/* Get associated gpio controller */
+static struct xilinx_gpio_priv *gpio_get_controller(unsigned gpio)
+{
+	struct list_head *entry;
+	struct xilinx_gpio_priv *priv = NULL;
+
+	list_for_each(entry, &gpio_list) {
+		priv = list_entry(entry, struct xilinx_gpio_priv, list);
+		if (gpio >= priv->gpio_min && gpio <= priv->gpio_max) {
+			debug("%s: reg: %x, min-max: %d-%d\n", __func__,
+			      (u32)priv->regs, priv->gpio_min, priv->gpio_max);
+			return priv;
+		}
+	}
+	puts("!!!Can't get gpio controller!!!\n");
+	return NULL;
+}
+
+/* Get gpio pin name if used/setup */
+static char *get_name(unsigned gpio)
+{
+	u32 gpio_priv;
+	debug("%s\n", __func__);
+
+	struct xilinx_gpio_priv *priv = gpio_get_controller(gpio);
+	gpio_priv = gpio - priv->gpio_min;
+
+	return *priv->gpio_name[gpio_priv].name ?
+				priv->gpio_name[gpio_priv].name : "UNKNOWN";
+}
+
+/* Get output value */
+static int gpio_get_output_value(unsigned gpio)
+{
+	u32 val, gpio_priv;
+	struct xilinx_gpio_priv *priv = gpio_get_controller(gpio);
+
+	gpio_priv = gpio - priv->gpio_min;
+	val = !!(priv->gpiodata_store & (1 << gpio_priv));
+	debug("%s: reg: %x, gpio_no: %d, dir: %d\n", __func__,
+	      (u32)priv->regs, gpio_priv, val);
+
+	return val;
+}
+
+/* Get input value */
+static int gpio_get_input_value(unsigned gpio)
+{
+	u32 val, gpio_priv;
+	struct xilinx_gpio_priv *priv = gpio_get_controller(gpio);
+	struct gpio_regs *regs = priv->regs;
+
+	gpio_priv = gpio - priv->gpio_min;
+	val = readl(&regs->gpiodata);
+	val = !!(val & (1 << gpio_priv));
+	debug("%s: reg: %x, gpio_no: %d, dir: %d\n", __func__,
+	      (u32)priv->regs, gpio_priv, val);
+
+	return val;
+}
+
+/* Set gpio direction */
+static int gpio_set_direction(unsigned gpio, enum gpio_direction direction)
+{
+	u32 val, gpio_priv;
+	struct xilinx_gpio_priv *priv = gpio_get_controller(gpio);
+	struct gpio_regs *regs = priv->regs;
+
+	val = readl(&regs->gpiodir);
+
+	gpio_priv = gpio - priv->gpio_min;
+	if (direction == GPIO_DIRECTION_OUT)
+		val &= ~(1 << gpio_priv);
+	else
+		val |= 1 << gpio_priv;
+
+	writel(val, &regs->gpiodir);
+	debug("%s: reg: %x, gpio_no: %d, dir: %d\n", __func__,
+	      (u32)priv->regs, gpio_priv, val);
+
+	return 0;
+}
+
+/* Get gpio direction */
+static int gpio_get_direction(unsigned gpio)
+{
+	u32 val, gpio_priv;
+	struct xilinx_gpio_priv *priv = gpio_get_controller(gpio);
+	struct gpio_regs *regs = priv->regs;
+
+	gpio_priv = gpio - priv->gpio_min;
+	val = readl(&regs->gpiodir);
+	val = !!(val & (1 << gpio_priv));
+	debug("%s: reg: %x, gpio_no: %d, dir: %d\n", __func__,
+	      (u32)priv->regs, gpio_priv, val);
+
+	return val;
+}
+
+/*
+ * Get input value
+ * for example gpio setup to output only can't get input value
+ * which is breaking gpio toggle command
+ */
+int gpio_get_value(unsigned gpio)
+{
+	u32 val;
+
+	if (gpio_get_direction(gpio) == GPIO_DIRECTION_OUT)
+		val = gpio_get_output_value(gpio);
+	else
+		val = gpio_get_input_value(gpio);
+
+	return val;
+}
+
+/* Set output value */
+int gpio_set_output_value(unsigned gpio, int value)
+{
+	u32 val, gpio_priv;
+	struct xilinx_gpio_priv *priv = gpio_get_controller(gpio);
+	struct gpio_regs *regs = priv->regs;
+
+	gpio_priv = gpio - priv->gpio_min;
+	val = priv->gpiodata_store;
+	if (value)
+		val |= 1 << gpio_priv;
+	else
+		val &= ~(1 << gpio_priv);
+
+	writel(val, &regs->gpiodata);
+	debug("%s: reg: %x, gpio_no: %d, output_val: %d\n", __func__,
+	      (u32)priv->regs, gpio_priv, val);
+	priv->gpiodata_store = val;
+
+	return 0;
+}
+
+/* Set GPIO as input */
+int gpio_direction_input(unsigned gpio)
+{
+	debug("%s\n", __func__);
+	return gpio_set_direction(gpio, GPIO_DIRECTION_IN);
+}
+
+/* Setup GPIO as output and set output value */
+int gpio_direction_output(unsigned gpio, int value)
+{
+	int ret = gpio_set_direction(gpio, GPIO_DIRECTION_OUT);
+
+	debug("%s\n", __func__);
+
+	if (ret < 0)
+		return ret;
+
+	gpio_set_output_value(gpio, value);
+	return 0;
+}
+
+/* Show gpio status */
+void gpio_info(void)
+{
+	unsigned gpio;
+
+	struct list_head *entry;
+	struct xilinx_gpio_priv *priv = NULL;
+
+	list_for_each(entry, &gpio_list) {
+		priv = list_entry(entry, struct xilinx_gpio_priv, list);
+		printf("\n%s: %s/%x (%d-%d)\n", __func__, priv->name,
+		       (u32)priv->regs, priv->gpio_min, priv->gpio_max);
+
+		for (gpio = priv->gpio_min; gpio <= priv->gpio_max; gpio++) {
+			printf("GPIO_%d:\t%s is an ", gpio, get_name(gpio));
+			if (gpio_get_direction(gpio) == GPIO_DIRECTION_OUT)
+				printf("OUTPUT value = %d\n",
+				       gpio_get_output_value(gpio));
+			else
+				printf("INPUT value = %d\n",
+				       gpio_get_input_value(gpio));
+		}
+	}
+}
+
+
+int gpio_request(unsigned gpio, const char *label)
+{
+	u32 gpio_priv;
+	struct xilinx_gpio_priv *priv;
+
+	if (gpio >= xilinx_gpio_max)
+		return -EINVAL;
+
+	priv = gpio_get_controller(gpio);
+	gpio_priv = gpio - priv->gpio_min;
+
+	if (label != NULL) {
+		strncpy(priv->gpio_name[gpio_priv].name, label, GPIO_NAME_SIZE);
+		priv->gpio_name[gpio_priv].name[GPIO_NAME_SIZE - 1] = '\0';
+	}
+
+	return 0;
+}
+
+int gpio_free(unsigned gpio)
+{
+	u32 gpio_priv;
+	struct xilinx_gpio_priv *priv;
+
+	if (gpio >= xilinx_gpio_max)
+		return -EINVAL;
+
+	priv = gpio_get_controller(gpio);
+	gpio_priv = gpio - priv->gpio_min;
+	priv->gpio_name[gpio_priv].name[0] = '\0';
+
+	/* Do nothing here */
+	return 0;
+}
+
+
+int gpio_alloc(u32 baseaddr, const char *name, u32 gpio_no)
+{
+	struct xilinx_gpio_priv *priv;
+
+	priv = calloc(1, sizeof(struct xilinx_gpio_priv));
+
+	/* Setup gpio name */
+	if (name != NULL) {
+		strncpy(priv->name, name, GPIO_NAME_SIZE);
+		priv->name[GPIO_NAME_SIZE - 1] = '\0';
+	}
+	priv->regs = (struct gpio_regs *)baseaddr;
+
+	priv->gpio_min = xilinx_gpio_max;
+	xilinx_gpio_max = priv->gpio_min + gpio_no;
+	priv->gpio_max = xilinx_gpio_max - 1;
+
+	priv->gpio_name = calloc(gpio_no, sizeof(struct gpio_names));
+
+	INIT_LIST_HEAD(&priv->list);
+	list_add_tail(&priv->list, &gpio_list);
+
+	printf("%s: Add %s (%d-%d)\n", __func__, name,
+	       priv->gpio_min, priv->gpio_max);
+
+	/* Return the first gpio allocated for this device */
+	return priv->gpio_min;
+}
+
+/* Dual channel gpio is one IP with two independent channels */
+int gpio_alloc_dual(u32 baseaddr, const char *name, u32 gpio_no0, u32 gpio_no1)
+{
+	int ret;
+
+	ret = gpio_alloc(baseaddr, name, gpio_no0);
+	gpio_alloc(baseaddr + 8, strcat((char *)name, "_1"), gpio_no1);
+
+	/* Return the first gpio allocated for this device */
+	return ret;
+}
diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h
index 0c4e719..17f53ba 100644
--- a/include/configs/microblaze-generic.h
+++ b/include/configs/microblaze-generic.h
@@ -104,7 +104,7 @@

 /* gpio */
 #ifdef XILINX_GPIO_BASEADDR
-# define CONFIG_SYS_GPIO_0		1
+# define CONFIG_XILINX_GPIO
 # define CONFIG_SYS_GPIO_0_ADDR		XILINX_GPIO_BASEADDR
 #endif

@@ -312,6 +312,7 @@
 #define CONFIG_CMD_IRQ
 #define CONFIG_CMD_MFSL
 #define CONFIG_CMD_ECHO
+#define CONFIG_CMD_GPIO

 #if defined(CONFIG_DCACHE) || defined(CONFIG_ICACHE)
 # define CONFIG_CMD_CACHE
--
1.8.2.1

-------------- next part --------------
A non-text attachment was scrubbed...
Name: not available
Type: application/pgp-signature
Size: 198 bytes
Desc: not available
URL: <http://lists.denx.de/pipermail/u-boot/attachments/20130424/929fc557/attachment.pgp>

[U-Boot] [RFC PATCH] gpio: Add support for microblaze xilinx GPIO

[Simon Glass]

Hi Michal,

On Wed, Apr 24, 2013 at 1:27 AM, Michal Simek <michal.simek@xilinx.com> wrote:
> Microblaze uses gpio which is connected to the system reset.
> Currently gpio subsystem wasn't used for it.
>
> Add gpio driver and change Microblaze reset logic to be done
> via gpio subsystem.
>
> There are various configurations which Microblaze can have
> that's why gpio_alloc/gpio_alloc_dual(for dual channel)
> function has been introduced and gpio can be allocated
> dynamically.
>
> Adding several gpios IP is also possible and supported.
>
> For listing gpio configuration please use "gpio status" command
>
> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
> ---
>  arch/microblaze/include/asm/gpio.h                 |  50 +---
>  .../xilinx/microblaze-generic/microblaze-generic.c |  17 +-
>  drivers/gpio/Makefile                              |   1 +
>  drivers/gpio/xilinx_gpio.c                         | 323 +++++++++++++++++++++
>  include/configs/microblaze-generic.h               |   3 +-
>  5 files changed, 353 insertions(+), 41 deletions(-)
>  create mode 100644 drivers/gpio/xilinx_gpio.c
>
> diff --git a/arch/microblaze/include/asm/gpio.h b/arch/microblaze/include/asm/gpio.h
> index 883f4d4..69df8c5 100644
> --- a/arch/microblaze/include/asm/gpio.h
> +++ b/arch/microblaze/include/asm/gpio.h
> @@ -1,41 +1,21 @@
>  #ifndef _ASM_MICROBLAZE_GPIO_H_
>  #define _ASM_MICROBLAZE_GPIO_H_
>
> -#include <asm/io.h>
> +/* Allocation functions */
> +extern int gpio_alloc_dual(u32 baseaddr, const char *name, u32 gpio_no0,
> +                          u32 gpio_no1);
> +extern int gpio_alloc(u32 baseaddr, const char *name, u32 gpio_no);
> +
> +/* Standard functions */
> +extern int gpio_request(unsigned gpio, const char *label);
> +extern int gpio_free(unsigned gpio);
> +extern int gpio_direction_input(unsigned gpio);
> +extern int gpio_direction_output(unsigned gpio, int value);
> +extern int gpio_get_value(unsigned gpio);
> +extern int gpio_set_value(unsigned gpio, int value);
> +extern int gpio_is_valid(int number);

You should just be able to include <asm-generic/gpio.h> for these.

> +#define gpio_status()  gpio_info()
> +extern void gpio_info(void);
>
> -static inline int gpio_request(unsigned gpio, const char *label)
> -{
> -       return 0;
> -}
> -
> -static inline int gpio_free(unsigned gpio)
> -{
> -       return 0;
> -}
> -
> -static inline int gpio_direction_input(unsigned gpio)
> -{
> -       return 0;
> -}
> -
> -static inline int gpio_direction_output(unsigned gpio, int value)
> -{
> -       return 0;
> -}
> -
> -static inline int gpio_get_value(unsigned gpio)
> -{
> -       return 0;
> -}
> -
> -static inline int gpio_set_value(unsigned gpio, int value)
> -{
> -       return 0;
> -}
> -
> -static inline int gpio_is_valid(int number)
> -{
> -       return 0;
> -}
>  #endif
>
> diff --git a/board/xilinx/microblaze-generic/microblaze-generic.c b/board/xilinx/microblaze-generic/microblaze-generic.c
> index befbb3a..2f5f20e 100644
> --- a/board/xilinx/microblaze-generic/microblaze-generic.c
> +++ b/board/xilinx/microblaze-generic/microblaze-generic.c
> @@ -31,12 +31,17 @@
>  #include <asm/processor.h>
>  #include <asm/microblaze_intc.h>
>  #include <asm/asm.h>
> +#include <asm/gpio.h>
> +
> +#ifdef CONFIG_XILINX_GPIO
> +static int reset_pin = -1;
> +#endif
>
>  int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
>  {
> -#ifdef CONFIG_SYS_GPIO_0
> -       *((unsigned long *)(CONFIG_SYS_GPIO_0_ADDR)) =
> -           ++(*((unsigned long *)(CONFIG_SYS_GPIO_0_ADDR)));
> +#ifdef CONFIG_XILINX_GPIO
> +       if (reset_pin != -1)
> +               gpio_direction_output(reset_pin, 1);
>  #endif
>
>  #ifdef CONFIG_XILINX_TB_WATCHDOG
> @@ -52,8 +57,10 @@ int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
>
>  int gpio_init (void)
>  {
> -#ifdef CONFIG_SYS_GPIO_0
> -       *((unsigned long *)(CONFIG_SYS_GPIO_0_ADDR)) = 0xFFFFFFFF;
> +#ifdef CONFIG_XILINX_GPIO
> +       reset_pin = gpio_alloc(CONFIG_SYS_GPIO_0_ADDR, "reset", 1);
> +       if (reset_pin != -1)
> +               gpio_request(reset_pin, "reset_pin");
>  #endif
>         return 0;
>  }
> diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
> index 9df1e26..830e8e6 100644
> --- a/drivers/gpio/Makefile
> +++ b/drivers/gpio/Makefile
> @@ -47,6 +47,7 @@ COBJS-$(CONFIG_OMAP_GPIO)     += omap_gpio.o
>  COBJS-$(CONFIG_DB8500_GPIO)    += db8500_gpio.o
>  COBJS-$(CONFIG_BCM2835_GPIO)   += bcm2835_gpio.o
>  COBJS-$(CONFIG_S3C2440_GPIO)   += s3c2440_gpio.o
> +COBJS-$(CONFIG_XILINX_GPIO)    += xilinx_gpio.o
>
>  COBJS  := $(COBJS-y)
>  SRCS   := $(COBJS:.o=.c)
> diff --git a/drivers/gpio/xilinx_gpio.c b/drivers/gpio/xilinx_gpio.c
> new file mode 100644
> index 0000000..f2c289f
> --- /dev/null
> +++ b/drivers/gpio/xilinx_gpio.c
> @@ -0,0 +1,323 @@
> +/*
> + * Copyright (c) 2013 Xilinx, Michal Simek
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#include <common.h>
> +#include <errno.h>
> +#include <malloc.h>
> +#include <linux/list.h>
> +#include <asm/io.h>
> +#include <asm/gpio.h>
> +
> +static LIST_HEAD(gpio_list);
> +
> +enum gpio_direction {
> +       GPIO_DIRECTION_OUT = 0,
> +       GPIO_DIRECTION_IN = 1,
> +};
> +
> +/* Gpio simple map */
> +struct gpio_regs {
> +       u32 gpiodata;
> +       u32 gpiodir;
> +};
> +
> +#define GPIO_NAME_SIZE 10
> +
> +struct gpio_names {
> +       char name[GPIO_NAME_SIZE];
> +};
> +
> +/* Initialized, rxbd_current, rx_first_buf must be 0 after init */
> +struct xilinx_gpio_priv {
> +       struct gpio_regs *regs;
> +       u32 gpio_min;
> +       u32 gpio_max;
> +       u32 gpiodata_store;
> +       char name[GPIO_NAME_SIZE];
> +       struct list_head list;
> +       struct gpio_names *gpio_name;
> +};
> +
> +/* Store number of allocated gpio pins */
> +static u32 xilinx_gpio_max;
> +
> +/* Get associated gpio controller */
> +static struct xilinx_gpio_priv *gpio_get_controller(unsigned gpio)
> +{
> +       struct list_head *entry;
> +       struct xilinx_gpio_priv *priv = NULL;
> +
> +       list_for_each(entry, &gpio_list) {
> +               priv = list_entry(entry, struct xilinx_gpio_priv, list);
> +               if (gpio >= priv->gpio_min && gpio <= priv->gpio_max) {
> +                       debug("%s: reg: %x, min-max: %d-%d\n", __func__,
> +                             (u32)priv->regs, priv->gpio_min, priv->gpio_max);
> +                       return priv;
> +               }
> +       }
> +       puts("!!!Can't get gpio controller!!!\n");
> +       return NULL;
> +}
> +
> +/* Get gpio pin name if used/setup */
> +static char *get_name(unsigned gpio)
> +{
> +       u32 gpio_priv;
> +       debug("%s\n", __func__);
> +
> +       struct xilinx_gpio_priv *priv = gpio_get_controller(gpio);

It looks like gpio_get_controller() can return NULL, but you use it anyway?

> +       gpio_priv = gpio - priv->gpio_min;
> +
> +       return *priv->gpio_name[gpio_priv].name ?
> +                               priv->gpio_name[gpio_priv].name : "UNKNOWN";
> +}
> +
> +/* Get output value */
> +static int gpio_get_output_value(unsigned gpio)
> +{
> +       u32 val, gpio_priv;
> +       struct xilinx_gpio_priv *priv = gpio_get_controller(gpio);
> +
> +       gpio_priv = gpio - priv->gpio_min;
> +       val = !!(priv->gpiodata_store & (1 << gpio_priv));
> +       debug("%s: reg: %x, gpio_no: %d, dir: %d\n", __func__,
> +             (u32)priv->regs, gpio_priv, val);
> +
> +       return val;
> +}
> +
> +/* Get input value */
> +static int gpio_get_input_value(unsigned gpio)
> +{
> +       u32 val, gpio_priv;
> +       struct xilinx_gpio_priv *priv = gpio_get_controller(gpio);
> +       struct gpio_regs *regs = priv->regs;
> +
> +       gpio_priv = gpio - priv->gpio_min;
> +       val = readl(&regs->gpiodata);
> +       val = !!(val & (1 << gpio_priv));
> +       debug("%s: reg: %x, gpio_no: %d, dir: %d\n", __func__,
> +             (u32)priv->regs, gpio_priv, val);
> +
> +       return val;
> +}
> +
> +/* Set gpio direction */
> +static int gpio_set_direction(unsigned gpio, enum gpio_direction direction)
> +{
> +       u32 val, gpio_priv;
> +       struct xilinx_gpio_priv *priv = gpio_get_controller(gpio);
> +       struct gpio_regs *regs = priv->regs;
> +
> +       val = readl(&regs->gpiodir);
> +
> +       gpio_priv = gpio - priv->gpio_min;
> +       if (direction == GPIO_DIRECTION_OUT)
> +               val &= ~(1 << gpio_priv);
> +       else
> +               val |= 1 << gpio_priv;
> +
> +       writel(val, &regs->gpiodir);
> +       debug("%s: reg: %x, gpio_no: %d, dir: %d\n", __func__,
> +             (u32)priv->regs, gpio_priv, val);
> +
> +       return 0;
> +}
> +
> +/* Get gpio direction */
> +static int gpio_get_direction(unsigned gpio)
> +{
> +       u32 val, gpio_priv;
> +       struct xilinx_gpio_priv *priv = gpio_get_controller(gpio);
> +       struct gpio_regs *regs = priv->regs;
> +
> +       gpio_priv = gpio - priv->gpio_min;
> +       val = readl(&regs->gpiodir);
> +       val = !!(val & (1 << gpio_priv));
> +       debug("%s: reg: %x, gpio_no: %d, dir: %d\n", __func__,
> +             (u32)priv->regs, gpio_priv, val);
> +
> +       return val;
> +}
> +
> +/*
> + * Get input value
> + * for example gpio setup to output only can't get input value
> + * which is breaking gpio toggle command
> + */
> +int gpio_get_value(unsigned gpio)
> +{
> +       u32 val;
> +
> +       if (gpio_get_direction(gpio) == GPIO_DIRECTION_OUT)
> +               val = gpio_get_output_value(gpio);
> +       else
> +               val = gpio_get_input_value(gpio);
> +
> +       return val;
> +}
> +
> +/* Set output value */
> +int gpio_set_output_value(unsigned gpio, int value)
> +{
> +       u32 val, gpio_priv;
> +       struct xilinx_gpio_priv *priv = gpio_get_controller(gpio);
> +       struct gpio_regs *regs = priv->regs;
> +
> +       gpio_priv = gpio - priv->gpio_min;
> +       val = priv->gpiodata_store;
> +       if (value)
> +               val |= 1 << gpio_priv;
> +       else
> +               val &= ~(1 << gpio_priv);
> +
> +       writel(val, &regs->gpiodata);
> +       debug("%s: reg: %x, gpio_no: %d, output_val: %d\n", __func__,
> +             (u32)priv->regs, gpio_priv, val);
> +       priv->gpiodata_store = val;
> +
> +       return 0;
> +}
> +
> +/* Set GPIO as input */
> +int gpio_direction_input(unsigned gpio)
> +{
> +       debug("%s\n", __func__);
> +       return gpio_set_direction(gpio, GPIO_DIRECTION_IN);
> +}
> +
> +/* Setup GPIO as output and set output value */
> +int gpio_direction_output(unsigned gpio, int value)
> +{
> +       int ret = gpio_set_direction(gpio, GPIO_DIRECTION_OUT);
> +
> +       debug("%s\n", __func__);
> +
> +       if (ret < 0)
> +               return ret;
> +
> +       gpio_set_output_value(gpio, value);
> +       return 0;
> +}
> +
> +/* Show gpio status */
> +void gpio_info(void)
> +{
> +       unsigned gpio;
> +
> +       struct list_head *entry;
> +       struct xilinx_gpio_priv *priv = NULL;
> +
> +       list_for_each(entry, &gpio_list) {
> +               priv = list_entry(entry, struct xilinx_gpio_priv, list);
> +               printf("\n%s: %s/%x (%d-%d)\n", __func__, priv->name,
> +                      (u32)priv->regs, priv->gpio_min, priv->gpio_max);
> +
> +               for (gpio = priv->gpio_min; gpio <= priv->gpio_max; gpio++) {
> +                       printf("GPIO_%d:\t%s is an ", gpio, get_name(gpio));
> +                       if (gpio_get_direction(gpio) == GPIO_DIRECTION_OUT)
> +                               printf("OUTPUT value = %d\n",
> +                                      gpio_get_output_value(gpio));
> +                       else
> +                               printf("INPUT value = %d\n",
> +                                      gpio_get_input_value(gpio));
> +               }
> +       }
> +}
> +
> +
> +int gpio_request(unsigned gpio, const char *label)
> +{
> +       u32 gpio_priv;
> +       struct xilinx_gpio_priv *priv;
> +
> +       if (gpio >= xilinx_gpio_max)
> +               return -EINVAL;
> +
> +       priv = gpio_get_controller(gpio);
> +       gpio_priv = gpio - priv->gpio_min;
> +
> +       if (label != NULL) {
> +               strncpy(priv->gpio_name[gpio_priv].name, label, GPIO_NAME_SIZE);
> +               priv->gpio_name[gpio_priv].name[GPIO_NAME_SIZE - 1] = '\0';
> +       }
> +
> +       return 0;
> +}
> +
> +int gpio_free(unsigned gpio)
> +{
> +       u32 gpio_priv;
> +       struct xilinx_gpio_priv *priv;
> +
> +       if (gpio >= xilinx_gpio_max)
> +               return -EINVAL;
> +
> +       priv = gpio_get_controller(gpio);
> +       gpio_priv = gpio - priv->gpio_min;
> +       priv->gpio_name[gpio_priv].name[0] = '\0';
> +
> +       /* Do nothing here */
> +       return 0;
> +}
> +
> +
> +int gpio_alloc(u32 baseaddr, const char *name, u32 gpio_no)
> +{
> +       struct xilinx_gpio_priv *priv;
> +
> +       priv = calloc(1, sizeof(struct xilinx_gpio_priv));
> +
> +       /* Setup gpio name */
> +       if (name != NULL) {
> +               strncpy(priv->name, name, GPIO_NAME_SIZE);
> +               priv->name[GPIO_NAME_SIZE - 1] = '\0';
> +       }
> +       priv->regs = (struct gpio_regs *)baseaddr;
> +
> +       priv->gpio_min = xilinx_gpio_max;
> +       xilinx_gpio_max = priv->gpio_min + gpio_no;
> +       priv->gpio_max = xilinx_gpio_max - 1;
> +
> +       priv->gpio_name = calloc(gpio_no, sizeof(struct gpio_names));
> +
> +       INIT_LIST_HEAD(&priv->list);
> +       list_add_tail(&priv->list, &gpio_list);
> +
> +       printf("%s: Add %s (%d-%d)\n", __func__, name,
> +              priv->gpio_min, priv->gpio_max);
> +
> +       /* Return the first gpio allocated for this device */
> +       return priv->gpio_min;
> +}

In terms of allocation, is this function intended to tell the GPIO
driver that there are new GPIOs available?

For device tree the GPIO banks can be split into individual nodes each
with the same compatible string. Then during device init you can build
a table of available GPIOs. Each bank gets a phandle so that it can be
used elsewhere. For example you might do:

gpio-controllers {
   gpa: gpio-a {
      compatible = "xilinx,gpio-controller";
      reg = <some_address  size>;
   };
   gpb: gpio-b {
      compatible = "xilinx,gpio-controller";
      reg = <some_address  size>;
   };
};

example-peripheral {
   gpios = <&gpa 5 ...>, <&gpb 6 ...>;
};

The exact binding of GPIOs is up to you - use the same one as Linux if
you have one there.

Regards,
Simon

[U-Boot] [RFC PATCH] gpio: Add support for microblaze xilinx GPIO

[Michal Simek]

On 04/27/2013 05:45 PM, Simon Glass wrote:
> Hi Michal,
> 
> On Wed, Apr 24, 2013 at 1:27 AM, Michal Simek <michal.simek@xilinx.com> wrote:
>> Microblaze uses gpio which is connected to the system reset.
>> Currently gpio subsystem wasn't used for it.
>>
>> Add gpio driver and change Microblaze reset logic to be done
>> via gpio subsystem.
>>
>> There are various configurations which Microblaze can have
>> that's why gpio_alloc/gpio_alloc_dual(for dual channel)
>> function has been introduced and gpio can be allocated
>> dynamically.
>>
>> Adding several gpios IP is also possible and supported.
>>
>> For listing gpio configuration please use "gpio status" command
>>
>> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
>> ---
>>  arch/microblaze/include/asm/gpio.h                 |  50 +---
>>  .../xilinx/microblaze-generic/microblaze-generic.c |  17 +-
>>  drivers/gpio/Makefile                              |   1 +
>>  drivers/gpio/xilinx_gpio.c                         | 323 +++++++++++++++++++++
>>  include/configs/microblaze-generic.h               |   3 +-
>>  5 files changed, 353 insertions(+), 41 deletions(-)
>>  create mode 100644 drivers/gpio/xilinx_gpio.c
>>
>> diff --git a/arch/microblaze/include/asm/gpio.h b/arch/microblaze/include/asm/gpio.h
>> index 883f4d4..69df8c5 100644
>> --- a/arch/microblaze/include/asm/gpio.h
>> +++ b/arch/microblaze/include/asm/gpio.h
>> @@ -1,41 +1,21 @@
>>  #ifndef _ASM_MICROBLAZE_GPIO_H_
>>  #define _ASM_MICROBLAZE_GPIO_H_
>>
>> -#include <asm/io.h>
>> +/* Allocation functions */
>> +extern int gpio_alloc_dual(u32 baseaddr, const char *name, u32 gpio_no0,
>> +                          u32 gpio_no1);
>> +extern int gpio_alloc(u32 baseaddr, const char *name, u32 gpio_no);
>> +
>> +/* Standard functions */
>> +extern int gpio_request(unsigned gpio, const char *label);
>> +extern int gpio_free(unsigned gpio);
>> +extern int gpio_direction_input(unsigned gpio);
>> +extern int gpio_direction_output(unsigned gpio, int value);
>> +extern int gpio_get_value(unsigned gpio);
>> +extern int gpio_set_value(unsigned gpio, int value);
>> +extern int gpio_is_valid(int number);
> 
> You should just be able to include <asm-generic/gpio.h> for these.

Thanks for pointing to this.

>> +/* Get gpio pin name if used/setup */
>> +static char *get_name(unsigned gpio)
>> +{
>> +       u32 gpio_priv;
>> +       debug("%s\n", __func__);
>> +
>> +       struct xilinx_gpio_priv *priv = gpio_get_controller(gpio);
> 
> It looks like gpio_get_controller() can return NULL, but you use it anyway?


yep. I have fixed that return path if gpio_get_controller returns NULL.


>> +
>> +int gpio_alloc(u32 baseaddr, const char *name, u32 gpio_no)
>> +{
>> +       struct xilinx_gpio_priv *priv;
>> +
>> +       priv = calloc(1, sizeof(struct xilinx_gpio_priv));
>> +
>> +       /* Setup gpio name */
>> +       if (name != NULL) {
>> +               strncpy(priv->name, name, GPIO_NAME_SIZE);
>> +               priv->name[GPIO_NAME_SIZE - 1] = '\0';
>> +       }
>> +       priv->regs = (struct gpio_regs *)baseaddr;
>> +
>> +       priv->gpio_min = xilinx_gpio_max;
>> +       xilinx_gpio_max = priv->gpio_min + gpio_no;
>> +       priv->gpio_max = xilinx_gpio_max - 1;
>> +
>> +       priv->gpio_name = calloc(gpio_no, sizeof(struct gpio_names));
>> +
>> +       INIT_LIST_HEAD(&priv->list);
>> +       list_add_tail(&priv->list, &gpio_list);
>> +
>> +       printf("%s: Add %s (%d-%d)\n", __func__, name,
>> +              priv->gpio_min, priv->gpio_max);
>> +
>> +       /* Return the first gpio allocated for this device */
>> +       return priv->gpio_min;
>> +}
> 
> In terms of allocation, is this function intended to tell the GPIO
> driver that there are new GPIOs available?

yep. That was my intention. Just call it from board file to tell
there are new gpios.


> For device tree the GPIO banks can be split into individual nodes each
> with the same compatible string. Then during device init you can build
> a table of available GPIOs. Each bank gets a phandle so that it can be
> used elsewhere. For example you might do:
> 
> gpio-controllers {
>    gpa: gpio-a {
>       compatible = "xilinx,gpio-controller";
>       reg = <some_address  size>;
>    };
>    gpb: gpio-b {
>       compatible = "xilinx,gpio-controller";
>       reg = <some_address  size>;
>    };
> };
> 
> example-peripheral {
>    gpios = <&gpa 5 ...>, <&gpb 6 ...>;
> };
> 
> The exact binding of GPIOs is up to you - use the same one as Linux if
> you have one there.

yep. I have designed these functions based on device-tree description
and to be able to use it for binding.

In general while loop over dts with compatible string to call this gpio_alloc
or gpio_alloc_dual based on properties.

Thanks,
Michal



-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform


-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 263 bytes
Desc: OpenPGP digital signature
URL: <http://lists.denx.de/pipermail/u-boot/attachments/20130429/69cf2006/attachment.pgp>

[U-Boot] [RFC PATCH 0/1] GPIO support for Microblaze

[Michal Simek]

Hi Simon,

here is also one small problem if you want to use patman just for one patch
then cover letter contains 0/1 but patch itself doesn't contain 1/1.

I think will be good to just add 1/1 to patch too.

Generated by:
./tools/patman/patman -c 1

Thanks,
Michal


On 04/24/2013 10:27 AM, Michal Simek wrote:
> I want to also write gpio support for Zynq
> and this driver should be also used for arm zynq.
> 
> Currently we have support just for only gpio controller
> but not for various of them.
> That's why I would like to get some input from you
> if possible to add dynamic gpio allocation which
> could be also helpful for OF support.
> 
> Output from my gpio status on Microblaze is below.
> 
> Thanks,
> Michal
> 
> U-Boot> gpio status
> 
> gpio_info: reset/40000000 (0-0)
> GPIO_0:	reset_pin is an INPUT value = 0
> 
> gpio_info: led/40040000 (1-5)
> GPIO_1:	UNKNOWN is an INPUT value = 0
> GPIO_2:	UNKNOWN is an OUTPUT value = 1
> GPIO_3:	UNKNOWN is an INPUT value = 0
> GPIO_4:	UNKNOWN is an INPUT value = 0
> GPIO_5:	UNKNOWN is an OUTPUT value = 0
> 
> 
> Michal Simek (1):
>   gpio: Add support for microblaze xilinx GPIO
> 
>  arch/microblaze/include/asm/gpio.h                 |  50 +---
>  .../xilinx/microblaze-generic/microblaze-generic.c |  17 +-
>  drivers/gpio/Makefile                              |   1 +
>  drivers/gpio/xilinx_gpio.c                         | 323 +++++++++++++++++++++
>  include/configs/microblaze-generic.h               |   3 +-
>  5 files changed, 353 insertions(+), 41 deletions(-)
>  create mode 100644 drivers/gpio/xilinx_gpio.c
> 
> --
> 1.8.2.1
> 


-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform


-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 263 bytes
Desc: OpenPGP digital signature
URL: <http://lists.denx.de/pipermail/u-boot/attachments/20130424/4cafcdb1/attachment.pgp>

[U-Boot] [RFC PATCH 0/1] GPIO support for Microblaze

[Simon Glass]

Hi Michal,

On Wed, Apr 24, 2013 at 1:30 AM, Michal Simek <monstr@monstr.eu> wrote:
> Hi Simon,
>
> here is also one small problem if you want to use patman just for one patch
> then cover letter contains 0/1 but patch itself doesn't contain 1/1.
>
> I think will be good to just add 1/1 to patch too.
>
> Generated by:
> ./tools/patman/patman -c 1

Possibly, although here patman is just using 'git format-patch' to
create the initial patch file.

There is a 'Series-notes:' tag for adding notes to the cover letter. I
wonder if we should add a way to add text below the cut in a patch?
Then in the case where you only have one patch you might not need a
cover letter.

Regards,
Simon

>
> Thanks,
> Michal
>
>
> On 04/24/2013 10:27 AM, Michal Simek wrote:
>> I want to also write gpio support for Zynq
>> and this driver should be also used for arm zynq.
>>
>> Currently we have support just for only gpio controller
>> but not for various of them.
>> That's why I would like to get some input from you
>> if possible to add dynamic gpio allocation which
>> could be also helpful for OF support.
>>
>> Output from my gpio status on Microblaze is below.
>>
>> Thanks,
>> Michal
>>
>> U-Boot> gpio status
>>
>> gpio_info: reset/40000000 (0-0)
>> GPIO_0:       reset_pin is an INPUT value = 0
>>
>> gpio_info: led/40040000 (1-5)
>> GPIO_1:       UNKNOWN is an INPUT value = 0
>> GPIO_2:       UNKNOWN is an OUTPUT value = 1
>> GPIO_3:       UNKNOWN is an INPUT value = 0
>> GPIO_4:       UNKNOWN is an INPUT value = 0
>> GPIO_5:       UNKNOWN is an OUTPUT value = 0
>>
>>
>> Michal Simek (1):
>>   gpio: Add support for microblaze xilinx GPIO
>>
>>  arch/microblaze/include/asm/gpio.h                 |  50 +---
>>  .../xilinx/microblaze-generic/microblaze-generic.c |  17 +-
>>  drivers/gpio/Makefile                              |   1 +
>>  drivers/gpio/xilinx_gpio.c                         | 323 +++++++++++++++++++++
>>  include/configs/microblaze-generic.h               |   3 +-
>>  5 files changed, 353 insertions(+), 41 deletions(-)
>>  create mode 100644 drivers/gpio/xilinx_gpio.c
>>
>> --
>> 1.8.2.1
>>
>
>
> --
> Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
> w: www.monstr.eu p: +42-0-721842854
> Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
> Maintainer of Linux kernel - Xilinx Zynq ARM architecture
> Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform
>
>

[U-Boot] [RFC PATCH 0/1] GPIO support for Microblaze

[Michal Simek]

On 04/27/2013 05:35 PM, Simon Glass wrote:
> Hi Michal,
> 
> On Wed, Apr 24, 2013 at 1:30 AM, Michal Simek <monstr@monstr.eu> wrote:
>> Hi Simon,
>>
>> here is also one small problem if you want to use patman just for one patch
>> then cover letter contains 0/1 but patch itself doesn't contain 1/1.
>>
>> I think will be good to just add 1/1 to patch too.
>>
>> Generated by:
>> ./tools/patman/patman -c 1
> 
> Possibly, although here patman is just using 'git format-patch' to
> create the initial patch file.

It is just to call "git format-patch -n" instead of git format-patch
all the time. For more that one patch is -n used all the time.

> There is a 'Series-notes:' tag for adding notes to the cover letter. I
> wonder if we should add a way to add text below the cut in a patch?

Isn't it already done - if you just add text below "---"?

> Then in the case where you only have one patch you might not need a
> cover letter.

I would prefer to support both option. If you have one patch you can
add notes below "---" or just create cover letter.
Developer should choose which way is better for his case.

Thanks,
Michal


-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform


-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 263 bytes
Desc: OpenPGP digital signature
URL: <http://lists.denx.de/pipermail/u-boot/attachments/20130429/e5a9ac97/attachment.pgp>