From: Troy Kisky <troy.kisky@boundarydevices.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 2/2] spi: mxc_spi: Update pre and post divider algorithm
Date: Thu, 09 May 2013 11:00:38 -0700 [thread overview]
Message-ID: <518BE446.9070306@boundarydevices.com> (raw)
In-Reply-To: <1368076793-24438-2-git-send-email-dirk.behme@gmail.com>
On 5/8/2013 10:19 PM, Dirk Behme wrote:
> The spi clock divisor is of the form x * (2**y), or x << y, where x is
> 1 to 16, and y is 0 to 15. Note the similarity with floating point numbers.
> Convert the desired divisor to the smallest number which is >= desired divisor,
> and can be represented in this form. The previous algorithm chose a divisor
> which could be almost twice as large as needed.
>
> Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
> Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
> ---
> drivers/spi/mxc_spi.c | 27 ++++++++++++---------------
> 1 file changed, 12 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/spi/mxc_spi.c b/drivers/spi/mxc_spi.c
> index 3e903b3..66c2ad8 100644
> --- a/drivers/spi/mxc_spi.c
> +++ b/drivers/spi/mxc_spi.c
> @@ -128,7 +128,7 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs,
> unsigned int max_hz, unsigned int mode)
> {
> u32 clk_src = mxc_get_clock(MXC_CSPI_CLK);
> - s32 pre_div = 1, post_div = 0, i, reg_ctrl, reg_config;
> + s32 pre_div = 1, post_div = 0, reg_ctrl, reg_config;
First, I'm totally fine with the patch as it is. I'm just going to point
out things you may want to change, or
send a follow-up patch.
Here, no need to initialize pre_div, post_div, if you delete the if
(clk_src > max_hz) below which is not needed.
> u32 ss_pol = 0, sclkpol = 0, sclkpha = 0;
> struct cspi_regs *regs = (struct cspi_regs *)mxcs->base;
>
> @@ -147,27 +147,24 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs,
> reg_ctrl |= MXC_CSPICTRL_EN;
> reg_write(®s->ctrl, reg_ctrl);
>
> - /*
> - * The following computation is taken directly from Freescale's code.
> - */
> if (clk_src > max_hz) {
This "if" can be removed.
> pre_div = DIV_ROUND_UP(clk_src, max_hz);
If you subtract -1 here instead of when you set the divisor register,
the logic becomes simpler
pre_div = DIV_ROUND_UP(clk_src, max_hz) - 1;
or just
pre_div = (clk_src - 1) / max_hz;
> - if (pre_div > 16) {
> - post_div = pre_div / 16;
> - pre_div = 16;
> - }
> - if (post_div != 0) {
> - for (i = 0; i < 16; i++) {
> - if ((1 << i) >= post_div)
> - break;
> - }
> - if (i == 16) {
> + /* fls(1) = 1, fls(0x80000000) = 32, fls(16) = 5 */
> + post_div = fls(pre_div - 1);
> + if (post_div > 4) {
> + post_div -= 4;
> +
> + if (post_div >= 16) {
> printf("Error: no divider for the freq: %d\n",
> max_hz);
> return -1;
> }
> - post_div = i;
> + pre_div = (pre_div + (1 << post_div) - 1) >> post_div;
This would become
pre_div >>= post_div;
> +
> + } else {
> + post_div = 0;
> }
> +
> }
>
> debug("pre_div = %d, post_div=%d\n", pre_div, post_div);
And
MXC_CSPICTRL_PREDIV(pre_div - 1);
would return to
MXC_CSPICTRL_PREDIV(pre_div);
Troy
next prev parent reply other threads:[~2013-05-09 18:00 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-05-09 5:19 [U-Boot] [PATCH v2 1/2] spi: mxc_spi: Fix pre and post divider calculation Dirk Behme
2013-05-09 5:19 ` [U-Boot] [PATCH 2/2] spi: mxc_spi: Update pre and post divider algorithm Dirk Behme
2013-05-09 18:00 ` Troy Kisky [this message]
2013-05-09 18:04 ` Troy Kisky
2013-05-10 5:34 ` Dirk Behme
2013-05-10 18:44 ` Troy Kisky
2013-05-10 19:08 ` Dirk Behme
2013-05-10 20:54 ` Troy Kisky
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