[U-Boot] Reading uninitialized SDRAM values on OMAP4460 (PandaBoard)

From: "André Schaller" <an.schall@googlemail.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] Reading uninitialized SDRAM values on OMAP4460 (PandaBoard)
Date: Fri, 17 May 2013 10:01:53 +0200	[thread overview]
Message-ID: <5195E3F1.7030309@googlemail.com> (raw)
In-Reply-To: <518B9DBF.6010600@ti.com>

Am 09.05.2013 14:59, schrieb Sricharan R:
> On Wednesday 08 May 2013 06:54 PM, An Schall wrote:
>> Hi there,
>>
>> my task is to output the uninitialized SDRAM values over UART during device
>> startup.
>>
>> Therefore, I first searched for the code that handles the SDRAM
>> initialization since I have to put my code in front of it. After digging
>> through the code and reading some mailing list entries, I guess it takes
>> place either in:
>>
>> arch/arm/cpu/armv7/start.S: after line 159 (after CPU was set to SVC3232
>> mode)
>>
>> or
>>
>> arch/arm/cpu/armv7/omap-common/lowlevel_init.S (which is quiet confusing to
>> me).
>>
>> I guess it takes place in start.S. If you could confirm this, it would be
>> very helpful.ti
>>
>> Next, I need to configure UART so I can iterate over the SDRAM and put each
>> single byte on UART.
>>
>> Do you have any information where I can find info on how to write ASM to
>> configure UART? ARM helpcenter is way too huge to find info in reasonable
>> time.
>>
>> Thanks in advance,
>> Andr?
>>
>>
>>
>> _______________________________________________
>> U-Boot mailing list
>> U-Boot at lists.denx.de
>> http://lists.denx.de/mailman/listinfo/u-boot
>  If your task is print the the uninitialised EMIF registers, then just
>  add prints before the function sdram_init() in s_init
>
>   arch/arm/cpu/armv7/omap-common/hwinit-common.c
>
> Regards,
>  Sricharan
>
Hi,

I have to get values of any *ram source. Currently I see the following
options:

1. The best solution would be to somehow read the whole SRAM of the
pandaboar (the development board I am experimenting with)
2. The memories in the subsystems (A9, DSP, M3-subsystem, ABE, IVA-HD)
3. SAR RAM
4. L3 OCM RAM

The EMIF registers are one possible choice. I am a little bit confused
reading the TRM. It states [1] size of EMIF1 and EMIF2 is 16 MB.
However, the documented registers are only 0xE8 bytes in size. What are
the residual bytes (64MB-0xE8?).

Is there a possibility to also address the other sources of SRAM,
mentioned above?

Thanks in advance.

Andr?

[1] - http://makelinux.net/lib/ti/OMAP4460/doc-3397