From mboxrd@z Thu Jan  1 00:00:00 1970
From: Marc Zyngier <marc.zyngier@arm.com>
Date: Thu, 23 May 2013 13:14:01 +0100
Subject: [U-Boot] [PATCH 1/6] ARM: add secure monitor handler to switch
 to non-secure state
In-Reply-To: <20130523125219.3522d2fb@lilith>
References: <1367846270-1827-1-git-send-email-andre.przywara@linaro.org>
	<1367846270-1827-2-git-send-email-andre.przywara@linaro.org>
	<20130523125219.3522d2fb@lilith>
Message-ID: <519E0809.2080004@arm.com>
List-Id: <u-boot.lists.denx.de>
MIME-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: 7bit
To: u-boot@lists.denx.de

On 23/05/13 11:52, Albert ARIBAUD wrote:
> Hi Andre,
> 
> On Mon,  6 May 2013 15:17:45 +0200, Andre Przywara
> <andre.przywara@linaro.org> wrote:
> 
>> A prerequisite for using virtualization is to be in HYP mode, which
>> requires the CPU to be in non-secure state.
>> Introduce a monitor handler routine which switches the CPU to
>> non-secure state by setting the NS and associated bits.
>> According to the ARM ARM this should not be done in SVC mode, so we
> 
> ARM *TRM*, I suspect. Also, as there are a lot of ARM TRMs, if there is
> a more precise reference, please provide it.

I believe the ARM ARM (as in ARM Architecture Reference Manual) is the
correct document here.

http://infocenter.arm.com/help/topic/com.arm.doc.ddi0406c/index.html

Cheers,

	M.
-- 
Jazz is not dead. It just smells funny...