From mboxrd@z Thu Jan  1 00:00:00 1970
From: Jeroen Hofstee <jeroen@myspectrum.nl>
Date: Thu, 20 Jun 2013 20:51:26 +0200
Subject: [U-Boot] AM335x: enabling datacache in SPL slows down system?
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References: <20130620080523.aba38cb4@mail.altenpts.nl>
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To: u-boot@lists.denx.de

Hallo Bas,

On 06/20/2013 10:05 AM, Bas van den Berg wrote:
> I'm trying to optimize the boottime for an AM335x based board. Currently
> we're loading the kernel from SPL directly (falcon mode). Loading the kernel
> from flash to ram takes roughly 3 seconds.
> When doing this from U-boot itself with 'nand read .., it only takes 1.8 seconds.
> It seems that U-boot has data_cache enabled, while SPL did not.
>
> When enabling the data cache with dcache_enable(), loading takes 3.5 seconds,
> so even slower! The enabling itself does not take a significant amount of time.
>
> Anyone have any idea why enabling the data cache slows SPL down?
> Or does U-boot do anything else that I'm missing?

For an am3517 I added the code below to spl_board_init to
enable caches in SPL. It adds the SRAM region to the mmu,
by an obvious hack, but it works. I don't remember by heart
why I change / update gd->tlb_addr. The used address is
somewhere in the end of DRAM.

No guarantees this is related to your issue (or to work at all).

---
Groet,
Jeroen

	if (!spl_start_uboot()) {
		dram_init_banksize();

		/* reserve TLB table (4k) */
		gd->tlb_addr = 0x8fff0000;
		debug("TLB table at: %08lx\n", gd->tlb_addr);

		/* add sram (64k actually, but the cp15 counts in MiBs) */
		gd->bd->bi_dram[1].start = CONFIG_SPL_TEXT_BASE;
		gd->bd->bi_dram[1].size =  (1 << 20);

		/* Enable caches */
		enable_caches();
	}