[U-Boot] [PATCH v2 7/7] am335x_evm: Add support to boot from NOR.

Mark Jackson
2013-07-11T13:06:26Z

On 18/06/13 13:11, Mark Jackson wrote:
> On 17/06/13 15:43, Mark Jackson wrote:
>> On 13/05/13 19:28, Tom Rini wrote:
>>> From: Steve Kipisz <s-kipisz2@ti.com>
>>>
>>> NOR requires that s_init be within the first 4KiB of the image so that
>>> we can perform the rest of the required pinmuxing to talk with the rest
>>> of NOR that we are found on. When NOR_BOOT is set we save our
>>> environment in NOR at 512KiB and a redundant copy at 768KiB. We avoid
>>> using SPL for this case and u-boot.bin is written directly to the start
>>> of NOR.
>>
>> I'm trying to get this up and running our NanoBone platform, but I'm having
>> no success.
>
> Just an update ... I now have it working ... yay !!
>
> The main (and possibly the *only*) culprit was that SYSBOOT[8] (which selects
> 8/16bit mode) was being incorrectly influenced by a hardware fault.
>
> I have pulled quite a few patches from various places, some of which might
> not be required. Now I have a working base, I'll work out what is needed
> on top of Tom's original patch set.

Okay ... I've now got NOR booting rebased to master using the patch set below.
This doesn't include my board code as that's of no interest until NOR booting
is added to the mainline code.

Sorry, Tom, I'm no git expert, so I'm not sure how to compare this to your
previous patches ... I hope this is useful in some way ??

Cheers
Mark J.
---
arch/arm/config.mk | 2 +-
arch/arm/cpu/armv7/am33xx/board.c | 2 +-
arch/arm/cpu/armv7/am33xx/emif4.c | 6 +++++-
arch/arm/cpu/armv7/am33xx/mem.c | 18 ++++++++----------
arch/arm/cpu/armv7/lowlevel_init.S | 2 +-
arch/arm/cpu/armv7/omap3/mem.c | 18 ++++--------------
arch/arm/cpu/armv7/start.S | 2 +-
7 files changed, 21 insertions(+), 29 deletions(-)

diff --git a/arch/arm/config.mk b/arch/arm/config.mk
index e80e1ed..ba310cb 100644
--- a/arch/arm/config.mk
+++ b/arch/arm/config.mk
@@ -111,6 +111,6 @@ endif
endif

# check that only R_ARM_RELATIVE relocations are generated
-ifneq ($(CONFIG_SPL_BUILD),y)
+ifneq ($(CONFIG_SPL_BUILD)$(CONFIG_NOR_BOOT),y)
ALL-y += checkarmreloc
endif
diff --git a/arch/arm/cpu/armv7/am33xx/board.c b/arch/arm/cpu/armv7/am33xx/board.c
index b935a29..3085292 100644
--- a/arch/arm/cpu/armv7/am33xx/board.c
+++ b/arch/arm/cpu/armv7/am33xx/board.c
@@ -150,7 +150,7 @@ int arch_misc_init(void)
return 0;
}

-#ifdef CONFIG_SPL_BUILD
+#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_NOR_BOOT)
void rtc32k_enable(void)
{
struct rtc_regs *rtc = (struct rtc_regs *)RTC_BASE;
diff --git a/arch/arm/cpu/armv7/am33xx/emif4.c b/arch/arm/cpu/armv7/am33xx/emif4.c
index aa84e96..370230b 100644
--- a/arch/arm/cpu/armv7/am33xx/emif4.c
+++ b/arch/arm/cpu/armv7/am33xx/emif4.c
@@ -43,9 +43,11 @@ void dram_init_banksize(void)
}

-#ifdef CONFIG_SPL_BUILD
+#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_NOR_BOOT)
+#ifdef CONFIG_TI81XX
static struct dmm_lisa_map_regs *hw_lisa_map_regs =
(struct dmm_lisa_map_regs *)DMM_BASE;
+#endif
static struct vtp_reg *vtpreg[2] = {
(struct vtp_reg *)VTP0_CTRL_ADDR,
(struct vtp_reg *)VTP1_CTRL_ADDR};
@@ -53,6 +55,7 @@ static struct vtp_reg *vtpreg[2] = {
static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR;
#endif

+#ifdef CONFIG_TI81XX
void config_dmm(const struct dmm_lisa_map_regs *regs)
{
enable_dmm_clocks();
@@ -67,6 +70,7 @@ void config_dmm(const struct dmm_lisa_map_regs *regs)
writel(regs->dmm_lisa_map_1, &hw_lisa_map_regs->dmm_lisa_map_1);
writel(regs->dmm_lisa_map_0, &hw_lisa_map_regs->dmm_lisa_map_0);
}
+#endif

static void config_vtp(int nr)
{
diff --git a/arch/arm/cpu/armv7/am33xx/mem.c b/arch/arm/cpu/armv7/am33xx/mem.c
index b86b0de..923ea83 100644
--- a/arch/arm/cpu/armv7/am33xx/mem.c
+++ b/arch/arm/cpu/armv7/am33xx/mem.c
@@ -75,16 +75,17 @@ void gpmc_init(void)
/* putting a blanket check on GPMC based on ZeBu for now */
gpmc_cfg = (struct gpmc *)GPMC_BASE;

-#ifdef CONFIG_CMD_NAND
- const u32 *gpmc_config = NULL;
- u32 base = 0;
- u32 size = 0;
-#endif
/* global settings */
writel(0x00000008, &gpmc_cfg->sysconfig);
+#ifdef CONFIG_NOR
+ writel(0x00000000, &gpmc_cfg->irqstatus);
+ writel(0x00000000, &gpmc_cfg->irqenable);
+ writel(0x00000A00, &gpmc_cfg->config);
+#else
writel(0x00000100, &gpmc_cfg->irqstatus);
writel(0x00000100, &gpmc_cfg->irqenable);
writel(0x00000012, &gpmc_cfg->config);
+#endif
/*
* Disable the GPMC0 config set by ROM code
*/
@@ -92,10 +93,7 @@ void gpmc_init(void)
sdelay(1000);

#ifdef CONFIG_CMD_NAND
- gpmc_config = gpmc_m_nand;
-
- base = PISMO1_NAND_BASE;
- size = PISMO1_NAND_SIZE;
- enable_gpmc_cs_config(gpmc_config, &gpmc_cfg->cs[0], base, size);
+ enable_gpmc_cs_config(gpmc_m_nand, &gpmc_cfg->cs[0],
+ CONFIG_SYS_NAND_BASE, GPMC_SIZE_256M);
#endif
}
diff --git a/arch/arm/cpu/armv7/lowlevel_init.S b/arch/arm/cpu/armv7/lowlevel_init.S
index 0a15aa4..eed9336 100644
--- a/arch/arm/cpu/armv7/lowlevel_init.S
+++ b/arch/arm/cpu/armv7/lowlevel_init.S
@@ -37,7 +37,7 @@ ENTRY(lowlevel_init)
*/
ldr sp, =CONFIG_SYS_INIT_SP_ADDR
bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
-#ifdef CONFIG_SPL_BUILD
+#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_NOR_BOOT)
ldr r8, =gdata
#else
sub sp, #GD_SIZE
diff --git a/arch/arm/cpu/armv7/omap3/mem.c b/arch/arm/cpu/armv7/omap3/mem.c
index d04a5a1..6f65a73 100644
--- a/arch/arm/cpu/armv7/omap3/mem.c
+++ b/arch/arm/cpu/armv7/omap3/mem.c
@@ -113,11 +113,6 @@ void gpmc_init(void)
{
/* putting a blanket check on GPMC based on ZeBu for now */
gpmc_cfg = (struct gpmc *)GPMC_BASE;
-#if defined(CONFIG_CMD_NAND) || defined(CONFIG_CMD_ONENAND)
- const u32 *gpmc_config = NULL;
- u32 base = 0;
- u32 size = 0;
-#endif
u32 config = 0;

/* global settings */
@@ -136,17 +131,12 @@ void gpmc_init(void)
sdelay(1000);

#if defined(CONFIG_CMD_NAND) /* CS 0 */
- gpmc_config = gpmc_m_nand;
-
- base = PISMO1_NAND_BASE;
- size = PISMO1_NAND_SIZE;
- enable_gpmc_cs_config(gpmc_config, &gpmc_cfg->cs[0], base, size);
+ enable_gpmc_cs_config(gpmc_m_nand, &gpmc_cfg->cs[0], PISMO1_NAND_BASE,
+ PISMO1_NAND_SIZE);
#endif

#if defined(CONFIG_CMD_ONENAND)
- gpmc_config = gpmc_onenand;
- base = PISMO1_ONEN_BASE;
- size = PISMO1_ONEN_SIZE;
- enable_gpmc_cs_config(gpmc_config, &gpmc_cfg->cs[0], base, size);
+ enable_gpmc_cs_config(gpmc_onenand, &gpmc_cfg->cs[0], PISMO1_ONEN_BASE,
+ PISMO1_ONEN_SIZE);
#endif
}
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index 8e9cb19..082998c 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -44,7 +44,7 @@ _start: b reset
ldr pc, _not_used
ldr pc, _irq
ldr pc, _fiq
-#ifdef CONFIG_SPL_BUILD
+#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_NOR_BOOT)
_undefined_instruction: .word _undefined_instruction
_software_interrupt: .word _software_interrupt
_prefetch_abort: .word _prefetch_abort