From mboxrd@z Thu Jan 1 00:00:00 1970 From: Eric Nelson Date: Wed, 17 Jul 2013 07:17:47 -0700 Subject: [U-Boot] i.MX6 DRAM_RESET documentation In-Reply-To: References: <51E5C241.4070901@boundarydevices.com> Message-ID: <51E6A78B.9060709@boundarydevices.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 07/16/2013 07:28 PM, Liu Hui-R64343 wrote: >> -----Original Message----- >> From: Troy Kisky [mailto:troy.kisky at boundarydevices.com] >> >> >> >> The working code uses a value of 00b for this field. When I changed it >> to 11b, things broke. In the documentation, this register is defined >> differently for mx6q vs mv6solo/duallite. The duallite way works for the >> quad, and either way works for the duallite. >> >> board/boundary/nitrogen6x/ddr-setup.cfg:DATA 4, MX6_IOM_DRAM_RESET, >> 0x000e0030 >> >> board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg:DATA 4 0x020e057c >> 0x00020030 >> >> >> Who's right? And should it depend on quad vs duallite ? >> Currently, I believe that the duallite documentation is correct for all. >> > > Both are not correct. The MMDC owner has known about this doc issue and will > Update them later. The correct is: 00 is the only valid data, others will be > Reserved. > Thank you very much for the concise and definitive reply.