From: Troy Kisky <troy.kisky@boundarydevices.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] i.MX6 DRAM_RESET documentation
Date: Wed, 17 Jul 2013 10:24:54 -0700 [thread overview]
Message-ID: <51E6D366.7000502@boundarydevices.com> (raw)
In-Reply-To: <51E6A78B.9060709@boundarydevices.com>
On 7/17/2013 7:17 AM, Eric Nelson wrote:
> On 07/16/2013 07:28 PM, Liu Hui-R64343 wrote:
>>> -----Original Message-----
>>> From: Troy Kisky [mailto:troy.kisky at boundarydevices.com]
>>>
> >> <snip>
>>>
>>> The working code uses a value of 00b for this field. When I changed it
>>> to 11b, things broke. In the documentation, this register is defined
>>> differently for mx6q vs mv6solo/duallite. The duallite way works for
>>> the
>>> quad, and either way works for the duallite.
>>>
>>> board/boundary/nitrogen6x/ddr-setup.cfg:DATA 4, MX6_IOM_DRAM_RESET,
>>> 0x000e0030
>>>
>>> board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg:DATA 4 0x020e057c
>>> 0x00020030
>>>
>>>
>>> Who's right? And should it depend on quad vs duallite ?
>>> Currently, I believe that the duallite documentation is correct for
>>> all.
>>>
>>
>> Both are not correct. The MMDC owner has known about this doc issue
>> and will
>> Update them later. The correct is: 00 is the only valid data, others
>> will be
>> Reserved.
>>
>
> Thank you very much for the concise and definitive reply.
>
>
Yes, thank you. I will send a patch for
board/boundary/nitrogen6x/ddr-setup.cfg
to match board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg
Troy
prev parent reply other threads:[~2013-07-17 17:24 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-07-16 21:59 [U-Boot] i.MX6 DRAM_RESET documentation Troy Kisky
2013-07-17 2:28 ` Liu Hui-R64343
2013-07-17 14:17 ` Eric Nelson
2013-07-17 17:24 ` Troy Kisky [this message]
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