From mboxrd@z Thu Jan  1 00:00:00 1970
From: Stephen Warren <swarren@wwwdotorg.org>
Date: Thu, 18 Jul 2013 15:19:18 -0600
Subject: [U-Boot] [PATCH 1/2] ARM: tegra: Make cache line size SoC
	specific
In-Reply-To: <1374174821-19981-1-git-send-email-thierry.reding@gmail.com>
References: <1374174821-19981-1-git-send-email-thierry.reding@gmail.com>
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On 07/18/2013 01:13 PM, Thierry Reding wrote:
> From: Thierry Reding <treding@nvidia.com>
> 
> Currently all Tegra SoCs are assumed to have 32 byte cache lines. This
> isn't true for Tegra114, however, which uses 4 Cortex-A15 cores and
> therefore uses a cache line size of 64 bytes. Move the cache line size
> setting to the per-SoC common configuration file.

Tested-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>