[U-Boot] [PATCH 6/6] am335x_evm: am33xx_spl_board_init function and scale core frequency

Tom Rini
2013-07-19T19:48:44Z

On Fri, Jul 19, 2013 at 09:37:51PM +0200, Enric Balletbo Serra wrote:
> Hi Tom,
>
> Just a comment below ...
>
> 2013/7/19 Tom Rini <trini@ti.com>:
> > Add a am33xx_spl_board_init (and enable the PMICs) that we may see,
> > depending on the board we are running on. In all cases, we see if we
> > can rely on the efuse_sma register to tell us the maximum speed. In the
> > case of Beaglebone White, we need to make sure we are on AC power, and
> > are on later than rev A1, and then we can ramp up to the PG1.0 maximum
> > of 720Mhz. In the case of Beaglebone Black, we are either on PG2.0 that
> > supports 1GHz or PG2.1. As PG2.0 may or may not have efuse_sma set, we
> > cannot rely on this probe. In the case of the GP EVM, EVM SK and IDK we
> > need to rely on the efuse_sma if we are on PG2.1, and the defaults for
> > PG1.0/2.0.
> >
> > Signed-off-by: Tom Rini <trini@ti.com>
> > ---
> > arch/arm/include/asm/arch-am33xx/clocks_am33xx.h | 8 ++
> > board/ti/am335x/board.c | 155 ++++++++++++++++++++++
> > include/configs/am335x_evm.h | 4 +
> > 3 files changed, 167 insertions(+)
> >
> > diff --git a/arch/arm/include/asm/arch-am33xx/clocks_am33xx.h b/arch/arm/include/asm/arch-am33xx/clocks_am33xx.h
> > index 89b63d9..834f24f 100644
> > --- a/arch/arm/include/asm/arch-am33xx/clocks_am33xx.h
> > +++ b/arch/arm/include/asm/arch-am33xx/clocks_am33xx.h
> > @@ -24,6 +24,14 @@
> > #define CONFIG_SYS_MPUCLK 550
> > #endif
> >
> > +/* MAIN PLL Fdll supported frequencies */
> > +#define MPUPLL_M_1000 1000
> > +#define MPUPLL_M_800 800
> > +#define MPUPLL_M_720 720
> > +#define MPUPLL_M_600 600
> > +#define MPUPLL_M_550 550
> > +#define MPUPLL_M_300 300
> > +
> > extern void pll_init(void);
> > extern void enable_emif_clocks(void);
> > extern void enable_dmm_clocks(void);
> > diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c
> > index fdbe26c..6544931 100644
> > --- a/board/ti/am335x/board.c
> > +++ b/board/ti/am335x/board.c
> > @@ -33,6 +33,8 @@
> > #include <i2c.h>
> > #include <miiphy.h>
> > #include <cpsw.h>
> > +#include <power/tps65217.h>
> > +#include <power/tps65910.h>
> > #include "board.h"
> >
> > DECLARE_GLOBAL_DATA_PTR;
> > @@ -282,6 +284,159 @@ int spl_start_uboot(void)
> > }
> > #endif
> >
> > +void am33xx_spl_board_init(void)
> > +{
> > + int mpu_vdd, mpu_pll, sil_rev;
> > +
> > + /* Assume PG 1.0 */
> > + mpu_pll = MPUPLL_M_720;
> > +
> > + sil_rev = readl(&cdev->deviceid) >> 28;
> > + if (sil_rev == 1)
> > + /* PG 2.0, efuse may not be set. */
> > + mpu_pll = MPUPLL_M_800;
> > + else if (sil_rev >= 2) {
> > + /* Check what the efuse says our max speed is. */
> > + int efuse_arm_mpu_max_freq;
> > + efuse_arm_mpu_max_freq = readl(&cdev->efuse_sma);
> > + switch ((efuse_arm_mpu_max_freq & DEVICE_ID_MASK)) {
> > + case AM335X_ZCZ_1000:
> > + mpu_pll = MPUPLL_M_1000;
> > + break;
> > + case AM335X_ZCZ_800:
> > + mpu_pll = MPUPLL_M_800;
> > + break;
> > + case AM335X_ZCZ_720:
> > + mpu_pll = MPUPLL_M_720;
> > + break;
> > + case AM335X_ZCZ_600:
> > + case AM335X_ZCE_600:
> > + mpu_pll = MPUPLL_M_600;
> > + break;
> > + case AM335X_ZCZ_300:
> > + case AM335X_ZCE_300:
> > + mpu_pll = MPUPLL_M_300;
> > + break;
> > + }
> > + }
> > +
> > + if (board_is_bone() || board_is_bone_lt()) {
> > + /* BeagleBone PMIC Code */
> > + int usb_cur_lim;
> > +
> > + /*
> > + * Only perform PMIC configurations if board rev > A1
> > + * on Beaglebone White
> > + */
> > + if (board_is_bone() && !strncmp(header.version, "00A1", 4))
> > + return;
> > +
> > + if (i2c_probe(TPS65217_CHIP_PM))
> > + return;
> > +
> > + /*
> > + * On Beaglebone White we need to ensure we have AC power
> > + * before increasing the frequency.
> > + */
> > + if (board_is_bone()) {
> > + uchar pmic_status_reg;
> > + if (tps65217_reg_read(STATUS, &pmic_status_reg))
> > + return;
> > + if (!(pmic_status_reg & PWR_SRC_AC_BITMASK)) {
> > + puts("No AC power, disabling frequency switch\n");
> > + return;
> > + }
> > + }
> > +
> > + /*
> > + * Increase USB current limit to 1300mA or 1800mA and set
> > + * the MPU voltage controller as needed.
> > + */
> > + if (mpu_pll == MPUPLL_M_1000) {
> > + usb_cur_lim = USB_INPUT_CUR_LIMIT_1800MA;
> > + mpu_vdd = DCDC_VOLT_SEL_1325MV;
> > + } else {
> > + usb_cur_lim = USB_INPUT_CUR_LIMIT_1300MA;
> > + mpu_vdd = DCDC_VOLT_SEL_1275MV;
> > + }
> > +
> > + if (tps65217_reg_write(PROT_LEVEL_NONE, POWER_PATH,
> > + usb_cur_lim, USB_INPUT_CUR_LIMIT_MASK))
> > + printf("tps65217_reg_write failure\n");
> > +
> > +
> > + /* Set DCDC2 (MPU) voltage */
> > + if (tps65217_voltage_update(DEFDCDC2, mpu_vdd)) {
> > + printf("tps65217_voltage_update failure\n");
> > + return;
> > + }
> > +
> > + /* Set LDO3, LDO4 output voltage to 3.3V */
> > + if (tps65217_reg_write(PROT_LEVEL_2, DEFLS1,
> > + LDO_VOLTAGE_OUT_3_3, LDO_MASK))
> > + printf("tps65217_reg_write failure\n");
> > +
> > + if (tps65217_reg_write(PROT_LEVEL_2, DEFLS2,
> > + LDO_VOLTAGE_OUT_3_3, LDO_MASK))
> > + printf("tps65217_reg_write failure\n");
> > + } else {
> > + uchar buf[4];
> > +
> > + /*
> > + * The GP EVM, IDK and EVM SK use a TPS65910 PMIC. For all
> > + * MPU frequencies we support we use a CORE voltage of
> > + * 1.1375V. For MPU voltage we need to switch based on
> > + * the frequency we are running at.
> > + */
> > + if (i2c_probe(TPS65910_CTRL_I2C_ADDR))
> > + return;
> > +
> > + /* VDD1/2 voltage selection register access by control i/f */
> > + if (i2c_read(TPS65910_CTRL_I2C_ADDR, TPS65910_DEVCTRL_REG, 1,
> > + buf, 1))
> > + return;
> > +
> > + buf[0] |= TPS65910_DEVCTRL_REG_SR_CTL_I2C_SEL_CTL_I2C;
> > +
> > + if (i2c_write(TPS65910_CTRL_I2C_ADDR, TPS65910_DEVCTRL_REG, 1,
> > + buf, 1))
> > + return;
> > +
> > + /* Depending on MPU clock we need different MPU VDD */
> > +
> > + /* Default to PG1.0/PG2.0 values. */
> > + mpu_vdd = TPS65910_OP_REG_SEL_1_1_3;
> > +
> > + if (sil_rev >= 2) {
> > + switch (mpu_pll) {
> > + case MPUPLL_M_1000:
> > + mpu_vdd = TPS65910_OP_REG_SEL_1_3_2_5;
> > + break;
> > + case MPUPLL_M_800:
> > + mpu_vdd = TPS65910_OP_REG_SEL_1_2_6;
> > + break;
> > + case MPUPLL_M_720:
> > + mpu_vdd = TPS65910_OP_REG_SEL_1_2_0;
> > + break;
> > + case MPUPLL_M_600:
> > + case MPUPLL_M_300:
> > + mpu_vdd = TPS65910_OP_REG_SEL_1_1_3;
> > + break;
> > + }
> > + }
> > +
> > + /* First update MPU voltage. */
> > + if (tps65910_voltage_update(MPU, mpu_vdd))
> > + return;
> > +
> > + /* Second, update the CORE voltage. */
> > + if (tps65910_voltage_update(CORE, TPS65910_OP_REG_SEL_1_1_3))
> > + return;
> > + }
> > +
> > + /* Set MPU Frequency to what we detected now that voltages are set */
> > + mpu_pll_config_val(mpu_pll);
> > +}
> > #endif
> >
>
> Would be possible rework this function in order to be more generic ?
> Or maybe split the parts that are common from the parts that are board
> specific ?
>
> I think part of this code can be shared for other boards that use
> AM335x processor ( like IGEP COM AQUILA.)

I think the answer is probably, depending on what other boards need.
The code to read efuse_sma is generic. The code to poke the tps65217 is
specific to tps65217-using boards but the sequence (aside from the
board_is_bone checks) would be generic. Same with tps65910 using
boards. Maybe the probe-and-check logic could be factored back to the
pmic file. I'll take a gander..

--
Tom
-------------- next part --------------
A non-text attachment was scrubbed...
Name: not available
Type: application/pgp-signature
Size: 836 bytes
Desc: Digital signature
URL: <http://lists.denx.de/pipermail/u-boot/attachments/20130719/bc493bcc/attachment.pgp>