From mboxrd@z Thu Jan 1 00:00:00 1970 From: Heiko Schocher Date: Wed, 31 Jul 2013 06:29:45 +0200 Subject: [U-Boot] [PATCH v3 8/9] tegra: i2c: Enable new CONFIG_SYS_I2C framework In-Reply-To: <51F80C56.40402@wwwdotorg.org> References: <1367668903-29653-1-git-send-email-hs@denx.de> <1367668903-29653-9-git-send-email-hs@denx.de> <51F6946F.8010500@wwwdotorg.org> <51F740FD.4080505@denx.de> <51F80C56.40402@wwwdotorg.org> Message-ID: <51F892B9.3030304@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hello Stephen Am 30.07.2013 20:56, schrieb Stephen Warren: > On 07/29/2013 10:28 PM, Heiko Schocher wrote: >> Hello Stephen, >> >> Am 29.07.2013 18:12, schrieb Stephen Warren: >>> On 05/04/2013 06:01 AM, Heiko Schocher wrote: >>>> From: Simon Glass >>>> >>>> This enables CONFIG_SYS_I2C on Tegra, updating existing boards and >>>> the Tegra >>>> i2c driver to support this. >>> >>> Heiko, the latest U-Boot tree hangs during boot on Tegra, and "git >> >> :-( >> >> Could you enable debug printf? >> >>> bisect" points at this patch. Olof reported the issue to me. >> >> Thanks! >> >>> Can you take a look at the code and see what might be wrong? Thanks. >> >> Yep. >> >>> I suspect some kind of initialization ordering issue, since the boot >>> messages are: >>> >>> ----- >>> U-Boot SPL 2013.07-rc3-00038-g880540d (Jul 29 2013 - 10:04:37) >>> U-Boot 2013.07-rc3-00038-g880540d (Jul 29 2013 - 10:04:37) >>> >>> TEGRA30 >>> Board: NVIDIA Beaver >>> I2C: Caller requested bad clock: periph=-49, parent=2 >>> ----- >>> >>> ... and that "bad clock" message implies to me that the I2C driver is >>> initializing before it has parsed the correct clock ID out of device >>> tree. >> >> Hmm... looking in the patch ... I can see nothing which changes >> some initializing order ... >> >> @Simon: Do you have an idea? >> >> just found some wrong settings for tegra30: >> >> In include/configs/tegra30-common.h: >> /* Total I2C ports on Tegra30 */ >> #define TEGRA_I2C_NUM_CONTROLLERS 5 >> >> README says: >> - drivers/i2c/tegra_i2c.c: >> - activate this driver with CONFIG_SYS_I2C_TEGRA >> - This driver adds 4 i2c buses with a fix speed from >> 100000 and the slave addr 0! > > I think that's just stale documentation; Tegra20 had just 4 I2C > controllers, and the docs probably weren't updated for Tegra30 which has 5. > >> end yes, in the i2c driver are only 4 ports activated ... this > > I don't see any limit in the driver; everything seems to use > TEGRA_I2C_NUM_CONTROLLERS. > >> should be changed ... but I think, this has nothing to do with >> your problem ... but try to add in the i2c driver one more i2c adapter >> for the case TEGRA_I2C_NUM_CONTROLLERS> 4 As I wrote here, add (at the end of the file): #if TEGRA_I2C_NUM_CONTROLLERS > 4 U_BOOT_I2C_ADAP_COMPLETE(tegra4, tegra_i2c_init, tegra_i2c_probe, tegra_i2c_read, tegra_i2c_write, tegra_i2c_set_bus_speed, 100000, 0, 4) #endif bye, Heiko