* [U-Boot] [PATCH] am33xx: Enable D-CACHE on !CONFIG_SYS_DCACHE_OFF @ 2013-08-23 16:26 Tom Rini 2013-08-30 4:50 ` Sricharan R 2013-12-13 12:46 ` [U-Boot] " Tom Rini 0 siblings, 2 replies; 7+ messages in thread From: Tom Rini @ 2013-08-23 16:26 UTC (permalink / raw) To: u-boot Test on Beaglebone white over cpsw, usb ether and SD card (read and write), performance increased, crc32 of data matches. Signed-off-by: Tom Rini <trini@ti.com> --- arch/arm/cpu/armv7/am33xx/board.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/cpu/armv7/am33xx/board.c b/arch/arm/cpu/armv7/am33xx/board.c index 2ea3d69..c261af5 100644 --- a/arch/arm/cpu/armv7/am33xx/board.c +++ b/arch/arm/cpu/armv7/am33xx/board.c @@ -225,3 +225,11 @@ void s_init(void) sdram_init(); #endif } + +#ifndef CONFIG_SYS_DCACHE_OFF +void enable_caches(void) +{ + /* Enable D-cache. I-cache is already enabled in start.S */ + dcache_enable(); +} +#endif /* !CONFIG_SYS_DCACHE_OFF */ -- 1.7.9.5 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* [U-Boot] [PATCH] am33xx: Enable D-CACHE on !CONFIG_SYS_DCACHE_OFF 2013-08-23 16:26 [U-Boot] [PATCH] am33xx: Enable D-CACHE on !CONFIG_SYS_DCACHE_OFF Tom Rini @ 2013-08-30 4:50 ` Sricharan R 2013-08-30 21:07 ` Tom Rini 2013-12-13 12:46 ` [U-Boot] " Tom Rini 1 sibling, 1 reply; 7+ messages in thread From: Sricharan R @ 2013-08-30 4:50 UTC (permalink / raw) To: u-boot Hi Tom, On Friday 23 August 2013 09:56 PM, Tom Rini wrote: > Test on Beaglebone white over cpsw, usb ether and SD card (read and > write), performance increased, crc32 of data matches. > > Signed-off-by: Tom Rini <trini@ti.com> > --- > arch/arm/cpu/armv7/am33xx/board.c | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/arch/arm/cpu/armv7/am33xx/board.c b/arch/arm/cpu/armv7/am33xx/board.c > index 2ea3d69..c261af5 100644 > --- a/arch/arm/cpu/armv7/am33xx/board.c > +++ b/arch/arm/cpu/armv7/am33xx/board.c > @@ -225,3 +225,11 @@ void s_init(void) > sdram_init(); > #endif > } > + > +#ifndef CONFIG_SYS_DCACHE_OFF > +void enable_caches(void) > +{ > + /* Enable D-cache. I-cache is already enabled in start.S */ > + dcache_enable(); > +} > +#endif /* !CONFIG_SYS_DCACHE_OFF */ This is fine. Do we have secure devices here ? If so, we should take care of setting the domains permissions for avoiding prefetch aborts. As it was done for OMAP using arm_init_domains. So that function and the above should be executed on am33xx as well. Thanks to Lokesh for reminding this. Regards, Sricharan ^ permalink raw reply [flat|nested] 7+ messages in thread
* [U-Boot] [PATCH] am33xx: Enable D-CACHE on !CONFIG_SYS_DCACHE_OFF 2013-08-30 4:50 ` Sricharan R @ 2013-08-30 21:07 ` Tom Rini 2013-08-30 21:13 ` Tom Rini 0 siblings, 1 reply; 7+ messages in thread From: Tom Rini @ 2013-08-30 21:07 UTC (permalink / raw) To: u-boot -----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 On 08/30/2013 12:50 AM, Sricharan R wrote: > Hi Tom, > > On Friday 23 August 2013 09:56 PM, Tom Rini wrote: >> Test on Beaglebone white over cpsw, usb ether and SD card (read and >> write), performance increased, crc32 of data matches. >> >> Signed-off-by: Tom Rini <trini@ti.com> >> --- >> arch/arm/cpu/armv7/am33xx/board.c | 8 ++++++++ >> 1 file changed, 8 insertions(+) >> >> diff --git a/arch/arm/cpu/armv7/am33xx/board.c b/arch/arm/cpu/armv7/am33xx/board.c >> index 2ea3d69..c261af5 100644 >> --- a/arch/arm/cpu/armv7/am33xx/board.c >> +++ b/arch/arm/cpu/armv7/am33xx/board.c >> @@ -225,3 +225,11 @@ void s_init(void) >> sdram_init(); >> #endif >> } >> + >> +#ifndef CONFIG_SYS_DCACHE_OFF >> +void enable_caches(void) >> +{ >> + /* Enable D-cache. I-cache is already enabled in start.S */ >> + dcache_enable(); >> +} >> +#endif /* !CONFIG_SYS_DCACHE_OFF */ > This is fine. Do we have secure devices here ? > > If so, we should take care of setting the domains permissions for > avoiding prefetch aborts. As it was done for OMAP using > arm_init_domains. So that function and the above should be executed on > am33xx as well. > > Thanks to Lokesh for reminding this. Yes, but I can't easily test them. I'll see if arm_init_domains just works on non-HS devices (I know I had a failure pulling all the OMAP4 code over, but didn't try hard, just looked again at the "easy" path). - -- Tom -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) Comment: Using GnuPG with Thunderbird - http://www.enigmail.net/ iQIcBAEBAgAGBQJSIQmFAAoJENk4IS6UOR1WkpUP/1dFyNkM9qk5xr37yBwmha/7 NbW0HYx2YyIHrEZ5W1KZJOXjaB6yQWtVAVKvcs2nrmo5GL+6e2ObY667EzrmxOlY UPcXguJ1TvtiMIH+TZjzTUudeIBOQU8Tj5y2ryauvebJGYr8vlzbF22Unc3I/ehO cRI49H573Yu+W0kReeM7lWel+uV2kx1Q4TjRqli5lj2vSjQijBEVhgdn3RQsjkVE ff8+4N6exzczUYzSjUUh5N5RDWQnQ6qAbDKW3fkVIfo7JsgxAz1zjyqZk7j7cBAL Xo28W4wtDY2HcwFs2wl3SlYly2Kvx+qY7IAbWhULaV5NbpNMn6ShUHO8W8fh4IDF bQckJ1UTek5Y4VEP+3PmOcWi0EPIuRxCtYenhZAbweaUZE+YyBUCfunM85BH+NuJ G68T7+4gNas1KFCMLFzUXFpxAN25erH5kh3A6CNbEJLhvhq+kv+zAHb/3nOO2N30 5OuyxKlQRNDZI7M/JYaxAB+8WAqzkOaAx25+ZnrBVRD6CmtrQ+67YePQlLhJamYB nBZn/qM03JqsbacntEgL+b7gGqS62OM8ivyUegUJudfXSWfn9XZoL6ilISeezCj0 +/7jAdFDk0h2SYOhmp8zUFigsWzn7QsF3AIgBbikYZUJ9jBGbwUSc8+YaDuM79nI LtEUu/4BbWlzKrpVC4wT =tpnc -----END PGP SIGNATURE----- ^ permalink raw reply [flat|nested] 7+ messages in thread
* [U-Boot] [PATCH] am33xx: Enable D-CACHE on !CONFIG_SYS_DCACHE_OFF 2013-08-30 21:07 ` Tom Rini @ 2013-08-30 21:13 ` Tom Rini 2013-09-02 3:52 ` Lokesh Vutla 0 siblings, 1 reply; 7+ messages in thread From: Tom Rini @ 2013-08-30 21:13 UTC (permalink / raw) To: u-boot On Fri, Aug 30, 2013 at 05:07:17PM -0400, Tom Rini wrote: > -----BEGIN PGP SIGNED MESSAGE----- > Hash: SHA1 > > On 08/30/2013 12:50 AM, Sricharan R wrote: > > Hi Tom, > > > > On Friday 23 August 2013 09:56 PM, Tom Rini wrote: > >> Test on Beaglebone white over cpsw, usb ether and SD card (read and > >> write), performance increased, crc32 of data matches. > >> > >> Signed-off-by: Tom Rini <trini@ti.com> > >> --- > >> arch/arm/cpu/armv7/am33xx/board.c | 8 ++++++++ > >> 1 file changed, 8 insertions(+) > >> > >> diff --git a/arch/arm/cpu/armv7/am33xx/board.c b/arch/arm/cpu/armv7/am33xx/board.c > >> index 2ea3d69..c261af5 100644 > >> --- a/arch/arm/cpu/armv7/am33xx/board.c > >> +++ b/arch/arm/cpu/armv7/am33xx/board.c > >> @@ -225,3 +225,11 @@ void s_init(void) > >> sdram_init(); > >> #endif > >> } > >> + > >> +#ifndef CONFIG_SYS_DCACHE_OFF > >> +void enable_caches(void) > >> +{ > >> + /* Enable D-cache. I-cache is already enabled in start.S */ > >> + dcache_enable(); > >> +} > >> +#endif /* !CONFIG_SYS_DCACHE_OFF */ > > This is fine. Do we have secure devices here ? > > > > If so, we should take care of setting the domains permissions for > > avoiding prefetch aborts. As it was done for OMAP using > > arm_init_domains. So that function and the above should be executed on > > am33xx as well. > > > > Thanks to Lokesh for reminding this. > > Yes, but I can't easily test them. I'll see if arm_init_domains just > works on non-HS devices (I know I had a failure pulling all the OMAP4 > code over, but didn't try hard, just looked again at the "easy" path). Yeah, that code as-is hangs the boards. So if the HS devices need something, it'll go with the rest of their patches until we're moving it upstream. But good to note a potential problem area! -- Tom -------------- next part -------------- A non-text attachment was scrubbed... Name: not available Type: application/pgp-signature Size: 836 bytes Desc: Digital signature URL: <http://lists.denx.de/pipermail/u-boot/attachments/20130830/8a5b601d/attachment.pgp> ^ permalink raw reply [flat|nested] 7+ messages in thread
* [U-Boot] [PATCH] am33xx: Enable D-CACHE on !CONFIG_SYS_DCACHE_OFF 2013-08-30 21:13 ` Tom Rini @ 2013-09-02 3:52 ` Lokesh Vutla 2013-09-06 18:01 ` Tom Rini 0 siblings, 1 reply; 7+ messages in thread From: Lokesh Vutla @ 2013-09-02 3:52 UTC (permalink / raw) To: u-boot Hi Tom, On Saturday 31 August 2013 02:43 AM, Tom Rini wrote: > On Fri, Aug 30, 2013 at 05:07:17PM -0400, Tom Rini wrote: > >> -----BEGIN PGP SIGNED MESSAGE----- >> Hash: SHA1 >> >> On 08/30/2013 12:50 AM, Sricharan R wrote: >>> Hi Tom, >>> >>> On Friday 23 August 2013 09:56 PM, Tom Rini wrote: >>>> Test on Beaglebone white over cpsw, usb ether and SD card (read and >>>> write), performance increased, crc32 of data matches. >>>> >>>> Signed-off-by: Tom Rini <trini@ti.com> >>>> --- >>>> arch/arm/cpu/armv7/am33xx/board.c | 8 ++++++++ >>>> 1 file changed, 8 insertions(+) >>>> >>>> diff --git a/arch/arm/cpu/armv7/am33xx/board.c b/arch/arm/cpu/armv7/am33xx/board.c >>>> index 2ea3d69..c261af5 100644 >>>> --- a/arch/arm/cpu/armv7/am33xx/board.c >>>> +++ b/arch/arm/cpu/armv7/am33xx/board.c >>>> @@ -225,3 +225,11 @@ void s_init(void) >>>> sdram_init(); >>>> #endif >>>> } >>>> + >>>> +#ifndef CONFIG_SYS_DCACHE_OFF >>>> +void enable_caches(void) >>>> +{ >>>> + /* Enable D-cache. I-cache is already enabled in start.S */ >>>> + dcache_enable(); >>>> +} >>>> +#endif /* !CONFIG_SYS_DCACHE_OFF */ >>> This is fine. Do we have secure devices here ? >>> >>> If so, we should take care of setting the domains permissions for >>> avoiding prefetch aborts. As it was done for OMAP using >>> arm_init_domains. So that function and the above should be executed on >>> am33xx as well. >>> >>> Thanks to Lokesh for reminding this. >> >> Yes, but I can't easily test them. I'll see if arm_init_domains just >> works on non-HS devices (I know I had a failure pulling all the OMAP4 >> code over, but didn't try hard, just looked again at the "easy" path). > > Yeah, that code as-is hangs the boards. So if the HS devices need > something, it'll go with the rest of their patches until we're moving it > upstream. But good to note a potential problem area! I added the following diff and I am able to boot my BBB over cpsw. diff --git a/arch/arm/cpu/armv7/am33xx/board.c b/arch/arm/cpu/armv7/am33xx/board.c index 2ea3d69..8a1a29a 100644 --- a/arch/arm/cpu/armv7/am33xx/board.c +++ b/arch/arm/cpu/armv7/am33xx/board.c @@ -31,6 +31,11 @@ #include <linux/usb/gadget.h> #include <linux/usb/musb.h> #include <asm/omap_musb.h> +#include <asm/cache.h> + +#define ARMV7_DCACHE_WRITEBACK 0xe +#define ARMV7_DOMAIN_CLIENT 1 +#define ARMV7_DOMAIN_MASK (0x3 << 0) DECLARE_GLOBAL_DATA_PTR; @@ -225,3 +230,40 @@ void s_init(void) sdram_init(); #endif } + +#ifndef CONFIG_SYS_DCACHE_OFF +void enable_caches(void) +{ + /* Enable D-cache. I-cache is already enabled in start.S */ + dcache_enable(); +} + +void dram_bank_mmu_setup(int bank) +{ + bd_t *bd = gd->bd; + int i; + + u32 start = bd->bi_dram[bank].start >> 20; + u32 size = bd->bi_dram[bank].size >> 20; + u32 end = start + size; + + debug("%s: bank: %d\n", __func__, bank); + for (i = start; i < end; i++) + set_section_dcache(i, ARMV7_DCACHE_WRITEBACK); + +} + +void arm_init_domains(void) +{ + u32 reg; + + reg = get_dacr(); + /* + * Set DOMAIN to client access so that all permissions + * set in pagetables are validated by the mmu. + */ + reg &= ~ARMV7_DOMAIN_MASK; + reg |= ARMV7_DOMAIN_CLIENT; + set_dacr(reg); +} +#endif AM I missing something here ? Thanks and regards, Lokesh > > > > _______________________________________________ > U-Boot mailing list > U-Boot at lists.denx.de > http://lists.denx.de/mailman/listinfo/u-boot > ^ permalink raw reply related [flat|nested] 7+ messages in thread
* [U-Boot] [PATCH] am33xx: Enable D-CACHE on !CONFIG_SYS_DCACHE_OFF 2013-09-02 3:52 ` Lokesh Vutla @ 2013-09-06 18:01 ` Tom Rini 0 siblings, 0 replies; 7+ messages in thread From: Tom Rini @ 2013-09-06 18:01 UTC (permalink / raw) To: u-boot On Mon, Sep 02, 2013 at 09:22:34AM +0530, Lokesh Vutla wrote: > Hi Tom, > On Saturday 31 August 2013 02:43 AM, Tom Rini wrote: > > On Fri, Aug 30, 2013 at 05:07:17PM -0400, Tom Rini wrote: > > > >> -----BEGIN PGP SIGNED MESSAGE----- > >> Hash: SHA1 > >> > >> On 08/30/2013 12:50 AM, Sricharan R wrote: > >>> Hi Tom, > >>> > >>> On Friday 23 August 2013 09:56 PM, Tom Rini wrote: > >>>> Test on Beaglebone white over cpsw, usb ether and SD card (read and > >>>> write), performance increased, crc32 of data matches. > >>>> > >>>> Signed-off-by: Tom Rini <trini@ti.com> > >>>> --- > >>>> arch/arm/cpu/armv7/am33xx/board.c | 8 ++++++++ > >>>> 1 file changed, 8 insertions(+) > >>>> > >>>> diff --git a/arch/arm/cpu/armv7/am33xx/board.c b/arch/arm/cpu/armv7/am33xx/board.c > >>>> index 2ea3d69..c261af5 100644 > >>>> --- a/arch/arm/cpu/armv7/am33xx/board.c > >>>> +++ b/arch/arm/cpu/armv7/am33xx/board.c > >>>> @@ -225,3 +225,11 @@ void s_init(void) > >>>> sdram_init(); > >>>> #endif > >>>> } > >>>> + > >>>> +#ifndef CONFIG_SYS_DCACHE_OFF > >>>> +void enable_caches(void) > >>>> +{ > >>>> + /* Enable D-cache. I-cache is already enabled in start.S */ > >>>> + dcache_enable(); > >>>> +} > >>>> +#endif /* !CONFIG_SYS_DCACHE_OFF */ > >>> This is fine. Do we have secure devices here ? > >>> > >>> If so, we should take care of setting the domains permissions for > >>> avoiding prefetch aborts. As it was done for OMAP using > >>> arm_init_domains. So that function and the above should be executed on > >>> am33xx as well. > >>> > >>> Thanks to Lokesh for reminding this. > >> > >> Yes, but I can't easily test them. I'll see if arm_init_domains just > >> works on non-HS devices (I know I had a failure pulling all the OMAP4 > >> code over, but didn't try hard, just looked again at the "easy" path). > > > > Yeah, that code as-is hangs the boards. So if the HS devices need > > something, it'll go with the rest of their patches until we're moving it > > upstream. But good to note a potential problem area! > I added the following diff and I am able to boot my BBB over cpsw. > > diff --git a/arch/arm/cpu/armv7/am33xx/board.c b/arch/arm/cpu/armv7/am33xx/board.c > index 2ea3d69..8a1a29a 100644 > --- a/arch/arm/cpu/armv7/am33xx/board.c > +++ b/arch/arm/cpu/armv7/am33xx/board.c > @@ -31,6 +31,11 @@ > #include <linux/usb/gadget.h> > #include <linux/usb/musb.h> > #include <asm/omap_musb.h> > +#include <asm/cache.h> > + > +#define ARMV7_DCACHE_WRITEBACK 0xe > +#define ARMV7_DOMAIN_CLIENT 1 > +#define ARMV7_DOMAIN_MASK (0x3 << 0) > > DECLARE_GLOBAL_DATA_PTR; > > @@ -225,3 +230,40 @@ void s_init(void) > sdram_init(); > #endif > } > + > +#ifndef CONFIG_SYS_DCACHE_OFF > +void enable_caches(void) > +{ > + /* Enable D-cache. I-cache is already enabled in start.S */ > + dcache_enable(); > +} > + > +void dram_bank_mmu_setup(int bank) > +{ > + bd_t *bd = gd->bd; > + int i; > + > + u32 start = bd->bi_dram[bank].start >> 20; > + u32 size = bd->bi_dram[bank].size >> 20; > + u32 end = start + size; > + > + debug("%s: bank: %d\n", __func__, bank); > + for (i = start; i < end; i++) > + set_section_dcache(i, ARMV7_DCACHE_WRITEBACK); > + > +} > + > +void arm_init_domains(void) > +{ > + u32 reg; > + > + reg = get_dacr(); > + /* > + * Set DOMAIN to client access so that all permissions > + * set in pagetables are validated by the mmu. > + */ > + reg &= ~ARMV7_DOMAIN_MASK; > + reg |= ARMV7_DOMAIN_CLIENT; > + set_dacr(reg); > +} > +#endif > > AM I missing something here ? Or I am. That gives me a straight up hang, like I saw before. What toolchain are you using? I'm trying ELDK 5.2 and Linaro 2013.04. -- Tom -------------- next part -------------- A non-text attachment was scrubbed... Name: not available Type: application/pgp-signature Size: 836 bytes Desc: Digital signature URL: <http://lists.denx.de/pipermail/u-boot/attachments/20130906/3ebb9f23/attachment.pgp> ^ permalink raw reply [flat|nested] 7+ messages in thread
* [U-Boot] am33xx: Enable D-CACHE on !CONFIG_SYS_DCACHE_OFF 2013-08-23 16:26 [U-Boot] [PATCH] am33xx: Enable D-CACHE on !CONFIG_SYS_DCACHE_OFF Tom Rini 2013-08-30 4:50 ` Sricharan R @ 2013-12-13 12:46 ` Tom Rini 1 sibling, 0 replies; 7+ messages in thread From: Tom Rini @ 2013-12-13 12:46 UTC (permalink / raw) To: u-boot On Fri, Aug 23, 2013 at 12:26:49PM -0400, Tom Rini wrote: > Test on Beaglebone white over cpsw, usb ether and SD card (read and > write), performance increased, crc32 of data matches. > > Signed-off-by: Tom Rini <trini@ti.com> Applied to u-boot-ti/master, thanks! -- Tom -------------- next part -------------- A non-text attachment was scrubbed... Name: not available Type: application/pgp-signature Size: 836 bytes Desc: Digital signature URL: <http://lists.denx.de/pipermail/u-boot/attachments/20131213/8d6cf073/attachment.pgp> ^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2013-12-13 12:46 UTC | newest] Thread overview: 7+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2013-08-23 16:26 [U-Boot] [PATCH] am33xx: Enable D-CACHE on !CONFIG_SYS_DCACHE_OFF Tom Rini 2013-08-30 4:50 ` Sricharan R 2013-08-30 21:07 ` Tom Rini 2013-08-30 21:13 ` Tom Rini 2013-09-02 3:52 ` Lokesh Vutla 2013-09-06 18:01 ` Tom Rini 2013-12-13 12:46 ` [U-Boot] " Tom Rini
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