From mboxrd@z Thu Jan 1 00:00:00 1970 From: York Sun Date: Fri, 6 Sep 2013 13:05:22 -0700 Subject: [U-Boot] [PATCH v2 06/11] mpc8xxx: set x2 DDR3 refresh rate if SPD config requires it In-Reply-To: <1377698669-6149-7-git-send-email-valentin.longchamp@keymile.com> References: <1377698669-6149-1-git-send-email-valentin.longchamp@keymile.com> <1377698669-6149-7-git-send-email-valentin.longchamp@keymile.com> Message-ID: <522A3582.5030508@freescale.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 08/28/2013 07:04 AM, Valentin Longchamp wrote: > If the DDR3 module supports industrial temperature range and requires > the x2 refresh rate for that temp range, the refresh period must be > 3.9us instead of 7.8 us. > > Signed-off-by: Valentin Longchamp > > --- > Can you add a line in commit message about on which board, what model memory modules have been verified? York