[U-Boot] [PATCH v3 0/3] arm: add support for LaCie CloudBox

[U-Boot] [PATCH v3 0/3] arm: add support for LaCie CloudBox

[Frédéric Leroy]

This series adds support for the LaCie Cloudbox v2 device.

Changes in v3:

- prepare other LaCie boards for led patch
- fix Machine ID
- use one commit for adding device

Changes in v2:

- sort unsorted #ifdef list in lacie_kw.h
- add entry to MAINTAINERS
- remove unused GPIO definitions
- remove empty misc_init_r()
- add Machine ID
- Use #define values for ethernet phy init
- checkpatch compliant

Fr?d?ric Leroy (3):
  lacie_kw: sort #ifdef lists by CONFIG_ identifiers
  LaCie/common: Uses #defines for ethernet phy leds setup
  arm: add support for LaCie CloudBox

 MAINTAINERS                       |   4 +
 board/LaCie/cloudbox/Makefile     |  46 +++++++++++
 board/LaCie/cloudbox/cloudbox.c   |  94 +++++++++++++++++++++
 board/LaCie/cloudbox/cloudbox.h   |  36 ++++++++
 board/LaCie/cloudbox/kwbimage.cfg | 167 ++++++++++++++++++++++++++++++++++++++
 board/LaCie/common/common.c       |  13 ++-
 boards.cfg                        |   1 +
 include/configs/lacie_kw.h        |  45 ++++++----
 8 files changed, 388 insertions(+), 18 deletions(-)
 create mode 100644 board/LaCie/cloudbox/Makefile
 create mode 100644 board/LaCie/cloudbox/cloudbox.c
 create mode 100644 board/LaCie/cloudbox/cloudbox.h
 create mode 100644 board/LaCie/cloudbox/kwbimage.cfg

-- 
1.8.1.2

[U-Boot] [PATCH v3 1/3] lacie_kw: sort #ifdef lists by CONFIG_ identifiers

[Frédéric Leroy]

Signed-off-by: Fr?d?ric Leroy <fredo@starox.org>
---
 include/configs/lacie_kw.h | 26 +++++++++++++-------------
 1 file changed, 13 insertions(+), 13 deletions(-)

diff --git a/include/configs/lacie_kw.h b/include/configs/lacie_kw.h
index e2b3b21..cac616a 100644
--- a/include/configs/lacie_kw.h
+++ b/include/configs/lacie_kw.h
@@ -21,29 +21,29 @@
 /*
  * Machine number definition
  */
-#if defined(CONFIG_INETSPACE_V2)
+#if defined(CONFIG_D2NET_V2)
+#define CONFIG_MACH_TYPE		MACH_TYPE_D2NET_V2
+#define CONFIG_IDENT_STRING		" D2 v2"
+#elif defined(CONFIG_INETSPACE_V2)
 #define CONFIG_MACH_TYPE		MACH_TYPE_INETSPACE_V2
 #define CONFIG_IDENT_STRING		" IS v2"
-#elif defined(CONFIG_NETSPACE_V2)
-#define CONFIG_MACH_TYPE		MACH_TYPE_NETSPACE_V2
-#define CONFIG_IDENT_STRING		" NS v2"
+#elif defined(CONFIG_NET2BIG_V2)
+#define CONFIG_MACH_TYPE		MACH_TYPE_NET2BIG_V2
+#define CONFIG_IDENT_STRING		" 2Big v2"
 #elif defined(CONFIG_NETSPACE_LITE_V2)
 #define MACH_TYPE_NETSPACE_LITE_V2	2983 /* missing in mach-types.h */
 #define CONFIG_MACH_TYPE		MACH_TYPE_NETSPACE_LITE_V2
 #define CONFIG_IDENT_STRING		" NS v2 Lite"
+#elif defined(CONFIG_NETSPACE_MAX_V2)
+#define CONFIG_MACH_TYPE		MACH_TYPE_NETSPACE_MAX_V2
+#define CONFIG_IDENT_STRING		" NS Max v2"
 #elif defined(CONFIG_NETSPACE_MINI_V2)
 #define MACH_TYPE_NETSPACE_MINI_V2	2831 /* missing in mach-types.h */
 #define CONFIG_MACH_TYPE		MACH_TYPE_NETSPACE_MINI_V2
 #define CONFIG_IDENT_STRING		" NS v2 Mini"
-#elif defined(CONFIG_NETSPACE_MAX_V2)
-#define CONFIG_MACH_TYPE		MACH_TYPE_NETSPACE_MAX_V2
-#define CONFIG_IDENT_STRING		" NS Max v2"
-#elif defined(CONFIG_D2NET_V2)
-#define CONFIG_MACH_TYPE		MACH_TYPE_D2NET_V2
-#define CONFIG_IDENT_STRING		" D2 v2"
-#elif defined(CONFIG_NET2BIG_V2)
-#define CONFIG_MACH_TYPE		MACH_TYPE_NET2BIG_V2
-#define CONFIG_IDENT_STRING		" 2Big v2"
+#elif defined(CONFIG_NETSPACE_V2)
+#define CONFIG_MACH_TYPE		MACH_TYPE_NETSPACE_V2
+#define CONFIG_IDENT_STRING		" NS v2"
 #else
 #error "Unknown board"
 #endif
-- 
1.8.1.2

[U-Boot] [PATCH v3 2/3] LaCie/common: Uses #defines for ethernet phy leds setup

[Frédéric Leroy]

The CloudBox device have a different ethernet phy setup than other ns2
devices.
Prepare source to use different init registers

Signed-off-by: Fr?d?ric Leroy <fredo@starox.org>
---
 board/LaCie/common/common.c | 13 ++++++++++---
 1 file changed, 10 insertions(+), 3 deletions(-)

diff --git a/board/LaCie/common/common.c b/board/LaCie/common/common.c
index a62bf9f..85480e7 100644
--- a/board/LaCie/common/common.c
+++ b/board/LaCie/common/common.c
@@ -21,6 +21,12 @@
 #define MV88E1116_RGMII_TXTM_CTRL	(1 << 4)
 #define MV88E1116_RGMII_RXTM_CTRL	(1 << 5)
 
+#if !defined(MII_MARVELL_LED_REG)
+# define MII_MARVELL_LED_REG 16
+# define MII_MARVELL_LED_MASK 0xf0
+# define MII_MARVELL_LED_VALUE 0x0f
+#endif
+
 void mv_phy_88e1116_init(const char *name, u16 phyaddr)
 {
 	u16 reg;
@@ -53,9 +59,10 @@ void mv_phy_88e1318_init(const char *name, u16 phyaddr)
 	 * Set control mode 4 for LED[0].
 	 */
 	miiphy_write(name, phyaddr, MII_MARVELL_PHY_PAGE, 3);
-	miiphy_read(name, phyaddr, 16, &reg);
-	reg |= 0xf;
-	miiphy_write(name, phyaddr, 16, reg);
+	miiphy_read(name, phyaddr, MII_MARVELL_LED_REG, &reg);
+	reg &= MII_MARVELL_LED_MASK;
+	reg |= MII_MARVELL_LED_VALUE;
+	miiphy_write(name, phyaddr, MII_MARVELL_LED_REG, reg);
 
 	/*
 	 * Enable RGMII delay on Tx and Rx for CPU port
-- 
1.8.1.2

[U-Boot] [PATCH v3 3/3] arm: add support for LaCie CloudBox

[Frédéric Leroy]

The LaCie CloudBox device is a Kirkwood based nas :

- SoC: Marvell 88F6702 1000Mhz
- SDRAM memory: 256MB DDR2 400Mhz
- Gigabit ethernet: PHY Marvell 88E1318
- Flash memory: SPI NOR 512KB (Macronix MX25L4005A)
- 1 push button
- 1 reset switch
- 1 SATA port
- 1 LED (bi-color, blue and red)

Signed-off-by: Fr?d?ric Leroy <fredo@starox.org>
---
 MAINTAINERS                       |   4 +
 board/LaCie/cloudbox/Makefile     |  46 +++++++++++
 board/LaCie/cloudbox/cloudbox.c   |  94 +++++++++++++++++++++
 board/LaCie/cloudbox/cloudbox.h   |  36 ++++++++
 board/LaCie/cloudbox/kwbimage.cfg | 167 ++++++++++++++++++++++++++++++++++++++
 boards.cfg                        |   1 +
 include/configs/lacie_kw.h        |  21 ++++-
 7 files changed, 366 insertions(+), 3 deletions(-)
 create mode 100644 board/LaCie/cloudbox/Makefile
 create mode 100644 board/LaCie/cloudbox/cloudbox.c
 create mode 100644 board/LaCie/cloudbox/cloudbox.h
 create mode 100644 board/LaCie/cloudbox/kwbimage.cfg

diff --git a/MAINTAINERS b/MAINTAINERS
index 3e70b03..9bf561d 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -770,6 +770,10 @@ Sergey Lapin <slapin@ossfans.org>
 
 	afeb9260	ARM926EJS (AT91SAM9260 SoC)
 
+Frederic Leroy <fredo@starox.org>
+
+	cloudbox	ARM926EJS (Kirkwood SoC)
+
 Valentin Longchamp <valentin.longchamp@keymile.com>
 
 	km_kirkwood	ARM926EJS (Kirkwood SoC)
diff --git a/board/LaCie/cloudbox/Makefile b/board/LaCie/cloudbox/Makefile
new file mode 100644
index 0000000..d656951
--- /dev/null
+++ b/board/LaCie/cloudbox/Makefile
@@ -0,0 +1,46 @@
+#
+# Copyright (C) 2013 Frederic Leroy <fredo@starox.org>
+#
+# Based on Kirkwood support:
+# (C) Copyright 2009
+# Marvell Semiconductor <www.marvell.com>
+# Written-by: Prafulla Wadaskar <prafulla@marvell.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+# GNU General Public License for more details.
+#
+
+include $(TOPDIR)/config.mk
+ifneq ($(OBJTREE),$(SRCTREE))
+$(shell mkdir -p $(obj)../common)
+endif
+
+LIB	= $(obj)lib$(BOARD).o
+
+COBJS	:= $(BOARD).o ../common/common.o
+
+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS))
+SOBJS	:= $(addprefix $(obj),$(SOBJS))
+
+$(LIB):	$(obj).depend $(OBJS) $(SOBJS)
+	$(call cmd_link_o_target, $(OBJS) $(SOBJS))
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/LaCie/cloudbox/cloudbox.c b/board/LaCie/cloudbox/cloudbox.c
new file mode 100644
index 0000000..51b1f96
--- /dev/null
+++ b/board/LaCie/cloudbox/cloudbox.c
@@ -0,0 +1,94 @@
+/*
+ * Copyright (C) 2013 Frederic Leroy <fredo@starox.org>
+ *
+ * Based on Kirkwood support:
+ * (C) Copyright 2009
+ * Marvell Semiconductor <www.marvell.com>
+ * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <common.h>
+#include <command.h>
+#include <asm/arch/cpu.h>
+#include <asm/arch/kirkwood.h>
+#include <asm/arch/mpp.h>
+#include <asm/arch/gpio.h>
+
+#include "cloudbox.h"
+#include "../common/common.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_early_init_f(void)
+{
+	/* Gpio configuration */
+	kw_config_gpio(CLOUDBOX_OE_VAL_LOW, CLOUDBOX_OE_VAL_HIGH,
+		       CLOUDBOX_OE_LOW, CLOUDBOX_OE_HIGH);
+
+	/* Multi-Purpose Pins Functionality configuration */
+	static const u32 kwmpp_config[] = {
+		MPP0_SPI_SCn,
+		MPP1_SPI_MOSI,
+		MPP2_SPI_SCK,
+		MPP3_SPI_MISO,
+		MPP4_GPIO, /* hard disk power */
+		MPP6_SYSRST_OUTn,
+		MPP8_TW_SDA,
+		MPP9_TW_SCK,
+		MPP10_UART0_TXD,
+		MPP11_UART0_RXD,
+		MPP14_GPIO, /* LED red control */
+		MPP15_SATA0_ACTn, /* LED blue control */
+		MPP16_GPIO, /* power push buton */
+		MPP17_GPIO, /* board power off */
+		MPP20_GPIO, /* Ethernet PHY interrupt (WoL) */
+		0
+	};
+	kirkwood_mpp_conf(kwmpp_config, NULL);
+
+	return 0;
+}
+
+int board_init(void)
+{
+	/* Machine number */
+	gd->bd->bi_arch_number = CONFIG_MACH_TYPE;
+
+	/* Boot parameters address */
+	gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
+
+	return 0;
+}
+
+#if defined(CONFIG_CMD_NET) && defined(CONFIG_RESET_PHY_R)
+/* Configure and initialize PHY */
+void reset_phy(void)
+{
+	mv_phy_88e1318_init("egiga0", 0);
+}
+#endif
+
+#if defined(CONFIG_KIRKWOOD_GPIO)
+/* Return GPIO button status */
+static int
+do_read_button(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+	return kw_gpio_get_value(CLOUDBOX_GPIO_BUTTON);
+}
+
+U_BOOT_CMD(button, 1, 1, do_read_button,
+	   "Return GPIO button status 0=off 1=on", "");
+#endif
diff --git a/board/LaCie/cloudbox/cloudbox.h b/board/LaCie/cloudbox/cloudbox.h
new file mode 100644
index 0000000..fb8af83
--- /dev/null
+++ b/board/LaCie/cloudbox/cloudbox.h
@@ -0,0 +1,36 @@
+/*
+ * Copyright (C) 2013 Frederic Leroy <fredo@starox.org>
+ *
+ * Based on LaCie u-boot sources
+ *
+ * Based on Kirkwood support:
+ * (C) Copyright 2009
+ * Marvell Semiconductor <www.marvell.com>
+ * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef CLOUDBOX_H
+#define CLOUDBOX_H
+
+/* GPIO configuration */
+#define CLOUDBOX_OE_LOW		0xF0310000
+#define CLOUDBOX_OE_HIGH		0x00000001
+#define CLOUDBOX_OE_VAL_LOW		0x00000010
+#define CLOUDBOX_OE_VAL_HIGH		0x00000000
+
+#define CLOUDBOX_GPIO_BUTTON         16
+
+#endif /* CLOUDBOX_H */
diff --git a/board/LaCie/cloudbox/kwbimage.cfg b/board/LaCie/cloudbox/kwbimage.cfg
new file mode 100644
index 0000000..a6a8ff9
--- /dev/null
+++ b/board/LaCie/cloudbox/kwbimage.cfg
@@ -0,0 +1,167 @@
+#
+# Copyright (C) 2013 Frederic Leroy <fredo@starox.org>
+#
+# Dram configuration based on Lacie u-boot sources
+#
+# Based on Kirkwood support:
+# (C) Copyright 2009
+# Marvell Semiconductor <www.marvell.com>
+# Written-by: Prafulla Wadaskar <prafulla@marvell.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# Refer doc/README.kwbimage for more details about how-to configure
+# and create kirkwood boot image
+#
+
+# Boot Media configurations
+BOOT_FROM	spi	# Boot from SPI flash
+
+# SOC registers configuration using bootrom header extension
+# Maximum KWBIMAGE_MAX_CONFIG configurations allowed
+
+#Dram initalization for DDR2 256MB, 400MHz, 1CS
+DATA 0xFFD01400 0x43010C30	# DDR Configuration register
+# bit13-0:  0xc30 (3120 DDR2 clks refresh rate)
+# bit23-14: zero
+# bit24: 1= enable exit self refresh mode on DDR access
+# bit25: 1 required
+# bit29-26: zero
+# bit31-30: 01
+
+DATA 0xFFD01404 0x38743000	# DDR Controller Control Low
+# bit 4:    0=addr/cmd in smame cycle
+# bit 5:    0=clk is driven during self refresh, we don't care for APX
+# bit 6:    0=use recommended falling edge of clk for addr/cmd
+# bit14:    0=input buffer always powered up
+# bit18:    1=cpu lock transaction enabled
+# bit23-20: 7= 5.5 cycles: Recommended for CL 6.
+
+# bit27-24: 8= CL+3, STARTBURST sample stages, for freqs 400MHz, unbuffered DIMM
+# bit30-28: 3 required
+# bit31:    0=no additional STARTBURST delay
+
+DATA 0xFFD01408 0x22135551	# DDR Timing (Low) (active cycles value +1)
+# bit7-4:   TRCD
+# bit11- 8: TRP
+# bit15-12: TWR
+# bit19-16: TWTR
+# bit20:    TRAS msb
+# bit23-21: 0x0
+# bit27-24: TRRD
+# bit31-28: TRTP
+
+DATA 0xFFD0140C 0x00000032	#  DDR Timing (High)
+# bit6-0:   TRFC
+# bit8-7:   TR2R
+# bit10-9:  TR2W
+# bit12-11: TW2W
+# bit31-13: zero required
+
+DATA 0xFFD01410 0x0000000C	#  DDR Address Control
+# This value is from Lacie U-Boot source.
+# It defines 4 1Gb bank, but there is only 2 on the device !
+# bit1-0:   00, Cs0width=x8
+# bit3-2:   11, Cs0size=1Gb
+# bit5-4:   00, Cs2width
+# bit7-6:   00, Cs1size
+# bit9-8:   00, Cs2width
+# bit11-10: 00, Cs2size
+# bit13-12: 00, Cs3width
+# bit15-14: 00, Cs3size
+# bit16:    0,  Cs0AddrSel
+# bit17:    0,  Cs1AddrSel
+# bit18:    0,  Cs2AddrSel
+# bit19:    0,  Cs3AddrSel
+# bit31-20: 0 required
+
+DATA 0xFFD01414 0x00000000	#  DDR Open Pages Control
+# bit0:    0,  OpenPage enabled
+# bit31-1: 0 required
+
+DATA 0xFFD01418 0x00000000	#  DDR Operation
+# bit3-0:   0x0, DDR cmd
+# bit31-4:  0 required
+
+DATA 0xFFD01498 0x00000000	#  DDR ODT Control (High)
+# bit1-0:  00, ODT0 controlled by ODT Control (low) register above
+# bit3-2:  00, ODT1 controlled by ODT Control register above
+# bit31-4: zero, required
+
+DATA 0xFFD0141C 0x00000662	#  DDR Mode
+# bit2-0:   2, BurstLen=2 required
+# bit3:     0, BurstType=0 required
+# bit6-4:   6, CL=6
+# bit7:     0, TestMode=0 normal
+# bit8:     0, DLL reset=0 normal
+# bit11-9:  6, This device does not support auto-precharge write recovery. Must be 0x3.
+# bit12:    0, PD must be zero
+# bit31-13: 0 required
+
+DATA 0xFFD01420 0x00000006	#  DDR Extended Mode
+# bit0:     0,  DDR DLL enabled
+# bit1:     1,  DDR drive strenght reduced
+# bit2,6    10, DDR ODT control enabled, 150 ohm termination
+# bit5-3:   000, required
+# bit9-7:   000, required
+# bit10:    0,  differential DQS enabled
+# bit11:    0, required
+# bit12:    0, DDR output buffer enabled
+# bit31-13: 0 required
+
+DATA 0xFFD01424 0x0000F177	#  DDR Controller Control High
+# bit2-0:  111, required
+# bit3  :  0  , MBUS Burst Chop enabled
+# bit6-4:  111, required
+# bit7  :  0  , Reserved Must be 0
+# bit8  :  1  , add writepath sample stage, must be 1 for DDR freq >= 300MHz
+# bit9  :  0  , no half clock cycle addition to dataout
+# bit10 :  0  , 1/4 clock cycle skew enabled for addr/ctl signals
+# bit11 :  0  , 1/4 clock cycle skew disabled for write mesh
+# bit15-12: 1111 required
+# bit31-16: 0    required
+
+DATA 0xFFD01428 0x00096630	# DDR2 ODT Read Timing (default values)
+DATA 0xFFD0147C 0x00009663	# DDR2 ODT Write Timing (default values)
+
+DATA 0xFFD01494 0x00010001	#  DDR ODT Control (Low)
+# bit3-0:  1, ODT0Rd, MODT[0] asserted during read from DRAM CS0
+# bit19-16:1, ODT0Wr, MODT[0] asserted during write to DRAM CS0
+
+DATA 0xFFD0149C 0x0000E811	# CPU ODT Control
+# bit3-0:   0001, internal ODT is asserted during read from DRAM bank 0
+# bit7-4:   0001, internal ODT is asserted during write from DRAM bank 0
+# bit9-8:   00, Internal ODT assertion/de-assertion is controlled by ODTRd/ODTWr fields
+# bit11-10: 10, DQ_ODTSel. ODT select turned on ( 75 ohm )
+# bit13-12: 10, 75 ohm DDR Controller M_STARTBURST_IN I/O buffer ODT Select
+# bit14:    1, DDR Controller M_STARTBURST_IN ODT Enable
+# bit15:    1, DDR IO ODT Unit : Use ODT Block
+
+DATA 0xFFD01500 0x00000000	# CS[0]n Base address to 0x0
+DATA 0xFFD01504 0x0FFFFFF1	# CS[0]n Size
+# bit0:    1,  Window enabled
+# bit1:    0,  Write Protect disabled
+# bit3-2:  00, CS0 hit selected
+# bit23-4: 1's, required
+# bit31-24: 0x0f, CPU CS Window0 Size
+
+DATA 0xFFD0150C 0x00000000 # bit 0: 0, Window1 disabled
+DATA 0xFFD01514 0x00000000 # bit 0: 0, Window2 disabled
+DATA 0xFFD0151C 0x00000000 # bit 0: 0, Window3 disabled
+
+DATA 0xFFD01480 0x00000001	# DDR Initialization Control
+#bit0=1, enable DDR init upon this register write
+
+# End of Header extension
+DATA 0x0 0x0
diff --git a/boards.cfg b/boards.cfg
index 1458289..11d7718 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -170,6 +170,7 @@ kmsuv31                      arm         arm926ejs   km_arm              keymile
 mgcoge3un                    arm         arm926ejs   km_arm              keymile        kirkwood    km_kirkwood:KM_MGCOGE3UN
 kmcoge5un                    arm         arm926ejs   km_arm              keymile        kirkwood    km_kirkwood:KM_COGE5UN
 portl2                       arm         arm926ejs   km_arm              keymile        kirkwood    km_kirkwood:KM_PORTL2
+cloudbox                     arm         arm926ejs   cloudbox            LaCie          kirkwood	lacie_kw:CLOUDBOX
 d2net_v2                     arm         arm926ejs   net2big_v2          LaCie          kirkwood        lacie_kw:D2NET_V2
 inetspace_v2                 arm         arm926ejs   netspace_v2         LaCie          kirkwood	lacie_kw:INETSPACE_V2
 net2big_v2                   arm         arm926ejs   net2big_v2          LaCie          kirkwood	lacie_kw:NET2BIG_V2
diff --git a/include/configs/lacie_kw.h b/include/configs/lacie_kw.h
index cac616a..7d784d3 100644
--- a/include/configs/lacie_kw.h
+++ b/include/configs/lacie_kw.h
@@ -21,7 +21,11 @@
 /*
  * Machine number definition
  */
-#if defined(CONFIG_D2NET_V2)
+#if defined(CONFIG_CLOUDBOX)
+#define MACH_TYPE_CLOUDBOX		4170 /* missing in mach-types.h */
+#define CONFIG_MACH_TYPE		MACH_TYPE_CLOUDBOX
+#define CONFIG_IDENT_STRING		" CloudBox"
+#elif defined(CONFIG_D2NET_V2)
 #define CONFIG_MACH_TYPE		MACH_TYPE_D2NET_V2
 #define CONFIG_IDENT_STRING		" D2 v2"
 #elif defined(CONFIG_INETSPACE_V2)
@@ -70,9 +74,11 @@
 #define CONFIG_CMD_DHCP
 #define CONFIG_CMD_PING
 #define CONFIG_CMD_SF
+#if !defined(CONFIG_CLOUDBOX)
 #define CONFIG_CMD_I2C
+#endif
 #define CONFIG_CMD_IDE
-#ifndef CONFIG_NETSPACE_MINI_V2 /* No USB ports on Network Space v2 Mini */
+#if !defined(CONFIG_NETSPACE_MINI_V2) && !defined(CONFIG_CLOUDBOX)
 #define CONFIG_CMD_USB
 #endif
 
@@ -111,7 +117,9 @@
 #define CONFIG_ENV_SPI_MAX_HZ           20000000 /* 20Mhz */
 #define CONFIG_SYS_IDE_MAXBUS           1
 #define CONFIG_SYS_IDE_MAXDEVICE        1
-#if defined(CONFIG_D2NET_V2)
+#if defined(CONFIG_CLOUDBOX)
+#define CONFIG_SYS_PROMPT		"cb> "
+#elif defined(CONFIG_D2NET_V2)
 #define CONFIG_SYS_PROMPT		"d2v2> "
 #elif defined(CONFIG_NET2BIG_V2)
 #define CONFIG_SYS_PROMPT		"2big2> "
@@ -122,7 +130,9 @@
 /*
  * Enable platform initialisation via misc_init_r() function
  */
+#if !defined(CONFIG_CLOUDBOX)
 #define CONFIG_MISC_INIT_R
+#endif
 
 /*
  * Ethernet Driver configuration
@@ -130,6 +140,11 @@
 #ifdef CONFIG_CMD_NET
 #define CONFIG_MVGBE_PORTS		{1, 0} /* enable port 0 only */
 #define CONFIG_NETCONSOLE
+#if defined(CONFIG_CLOUDBOX)
+# define MII_MARVELL_LED_REG 17
+# define MII_MARVELL_LED_MASK 0xffc0
+# define MII_MARVELL_LED_VALUE 0x15
+#endif
 #endif
 
 /*
-- 
1.8.1.2

[U-Boot] [PATCH v3 0/3] arm: add support for LaCie CloudBox

[Simon Guinot]

On Mon, Jul 01, 2013 at 02:57:43PM +0200, Fr?d?ric Leroy wrote:
> This series adds support for the LaCie Cloudbox v2 device.
> 
> Changes in v3:
> 
> - prepare other LaCie boards for led patch
> - fix Machine ID
> - use one commit for adding device
> 
> Changes in v2:
> 
> - sort unsorted #ifdef list in lacie_kw.h
> - add entry to MAINTAINERS
> - remove unused GPIO definitions
> - remove empty misc_init_r()
> - add Machine ID
> - Use #define values for ethernet phy init
> - checkpatch compliant
> 
> Fr?d?ric Leroy (3):
>   lacie_kw: sort #ifdef lists by CONFIG_ identifiers
>   LaCie/common: Uses #defines for ethernet phy leds setup
>   arm: add support for LaCie CloudBox
> 
>  MAINTAINERS                       |   4 +
>  board/LaCie/cloudbox/Makefile     |  46 +++++++++++
>  board/LaCie/cloudbox/cloudbox.c   |  94 +++++++++++++++++++++
>  board/LaCie/cloudbox/cloudbox.h   |  36 ++++++++
>  board/LaCie/cloudbox/kwbimage.cfg | 167 ++++++++++++++++++++++++++++++++++++++
>  board/LaCie/common/common.c       |  13 ++-
>  boards.cfg                        |   1 +
>  include/configs/lacie_kw.h        |  45 ++++++----
>  8 files changed, 388 insertions(+), 18 deletions(-)
>  create mode 100644 board/LaCie/cloudbox/Makefile
>  create mode 100644 board/LaCie/cloudbox/cloudbox.c
>  create mode 100644 board/LaCie/cloudbox/cloudbox.h
>  create mode 100644 board/LaCie/cloudbox/kwbimage.cfg

For the whole patch series:
Acked-by: Simon Guinot <simon.guinot@sequanux.org>

Regards,

Simon
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[U-Boot] [PATCH v3 0/3] arm: add support for LaCie CloudBox

[Prafulla Wadaskar]

> -----Original Message-----
> From: Fr?d?ric Leroy [mailto:fredo at starox.org]
> Sent: 01 July 2013 18:28
> To: u-boot at lists.denx.de
> Cc: Wolfgang Denk; Prafulla Wadaskar; Albert ARIBAUD;
> Simon Guinot
> Subject: [PATCH v3 0/3] arm: add support for LaCie
> CloudBox
> 
> This series adds support for the LaCie Cloudbox v2
> device.
> 
> Changes in v3:
> 
> - prepare other LaCie boards for led patch
> - fix Machine ID
> - use one commit for adding device
> 
> Changes in v2:
> 
> - sort unsorted #ifdef list in lacie_kw.h
> - add entry to MAINTAINERS
> - remove unused GPIO definitions
> - remove empty misc_init_r()
> - add Machine ID
> - Use #define values for ethernet phy init
> - checkpatch compliant
> 
> Fr?d?ric Leroy (3):
>   lacie_kw: sort #ifdef lists by CONFIG_ identifiers
>   LaCie/common: Uses #defines for ethernet phy leds
> setup
>   arm: add support for LaCie CloudBox
> 
>  MAINTAINERS                       |   4 +
>  board/LaCie/cloudbox/Makefile     |  46 +++++++++++
>  board/LaCie/cloudbox/cloudbox.c   |  94
> +++++++++++++++++++++
>  board/LaCie/cloudbox/cloudbox.h   |  36 ++++++++
>  board/LaCie/cloudbox/kwbimage.cfg | 167
> ++++++++++++++++++++++++++++++++++++++
>  board/LaCie/common/common.c       |  13 ++-
>  boards.cfg                        |   1 +
>  include/configs/lacie_kw.h        |  45 ++++++----
>  8 files changed, 388 insertions(+), 18 deletions(-)
>  create mode 100644 board/LaCie/cloudbox/Makefile
>  create mode 100644 board/LaCie/cloudbox/cloudbox.c
>  create mode 100644 board/LaCie/cloudbox/cloudbox.h
>  create mode 100644 board/LaCie/cloudbox/kwbimage.cfg
> 

Dear Fr?d?ric Leroy

I express my great apology for not providing review comments in time. I am very busy with some priority task.

I would be free by 16th July to do the right justification with the review of all the patches on my plate.

This is applicable to all other patches too, those seeks my attention on the mailing list.

For any urgent matters, may be Albert can pull the Marvell specific stuffs directly (if he thinks this is okay).

Once again sorry for inconvenience :(

Regards...
Prafulla . . .

[U-Boot] [PATCH v3 0/3] arm: add support for LaCie CloudBox

[Frédéric Leroy]

Hello Prafulla,

Le 02/07/2013 00:24, Prafulla Wadaskar a ?crit :
> > -----Original Message-----
> > From: Fr?d?ric Leroy [mailto:fredo at starox.org]
> > Sent: 01 July 2013 18:28
> > To: u-boot at lists.denx.de
> > Cc: Wolfgang Denk; Prafulla Wadaskar; Albert ARIBAUD;
> > Simon Guinot
> > Subject: [PATCH v3 0/3] arm: add support for LaCie
> > CloudBox
> > 
> > This series adds support for the LaCie Cloudbox v2
> > device.
>
> Dear Fr?d?ric Leroy
>
> I express my great apology for not providing review comments in time. I am very busy with some priority task.
>
> I would be free by 16th July to do the right justification with the review of all the patches on my plate.
>
> This is applicable to all other patches too, those seeks my attention on the mailing list.
>
> For any urgent matters, may be Albert can pull the Marvell specific stuffs directly (if he thinks this is okay).
>
> Once again sorry for inconvenience :(
>
> Regards...
> Prafulla . . .
> _______________________________________________
>

We are now well over the 16th July. Do you had time to review my patches ?

Best regards,

-- 
Fr?d?ric

[U-Boot] [PATCH v3 0/3] arm: add support for LaCie CloudBox

[Frédéric Leroy]

Le 02/07/2013 00:24, Prafulla Wadaskar a ?crit :
> > -----Original Message-----
> > From: Fr?d?ric Leroy [mailto:fredo at starox.org]
> > Sent: 01 July 2013 18:28
> > To: u-boot at lists.denx.de
> > Cc: Wolfgang Denk; Prafulla Wadaskar; Albert ARIBAUD;
> > Simon Guinot
> > Subject: [PATCH v3 0/3] arm: add support for LaCie
> > CloudBox
> > 
> > This series adds support for the LaCie Cloudbox v2
> > device.
> > 
> > Changes in v3:
> > 
> > [...]
> > 
>
> Dear Fr?d?ric Leroy
>
> I express my great apology for not providing review comments in time. I am very busy with some priority task.
>
> I would be free by 16th July to do the right justification with the review of all the patches on my plate.
>
> This is applicable to all other patches too, those seeks my attention on the mailing list.
>
> For any urgent matters, may be Albert can pull the Marvell specific stuffs directly (if he thinks this is okay).
>
> Once again sorry for inconvenience :(
>
> Regards...
> Prafulla . . .
>

Hello Prafulla,

Have you time to review my patch ?
Does Albert need to take it ?

Regards,

-- 
Fr?d?ric Leroy