* [U-Boot] [PATCH v1 2/2] ti814x_evm: enable support for NAND @ 2013-09-16 9:51 Gupta, Pekon 2013-09-19 18:09 ` Tom Rini 0 siblings, 1 reply; 5+ messages in thread From: Gupta, Pekon @ 2013-09-16 9:51 UTC (permalink / raw) To: u-boot > On Tue, Aug 06, 2013 at 01:45:08PM +0530, Pekon Gupta wrote: > > > ti814x_evm has on-board socket for using Micron (MT29Fxx) family of > > NAND devices to GPMC interface. This patch > > - adds NAND related pin-mux configuration for same > > - adds #defines for NAND partitions to TI814x configs > > - enables support for NAND in TI814x configs [snip] > > > @@ -186,6 +193,14 @@ > > #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ > > #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1 > > #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img" > > + > > +#ifdef CONFIG_SPL_OS_BOOT > > +/* nand */ > > +#define CONFIG_CMD_SPL_NAND_OFS 0x000000 /* > end of u-boot */ > > +#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000 > > +#define CONFIG_CMD_SPL_WRITE_SIZE 0x1000 > > +#endif > > Since you aren't adding the SD/MMC defines as well, nor setting > SPL_OS_BOOT, lets drop these. > Sorry but dint get your feedback. Following are used in SPL boot for loading env and kernel in falcon mode. Referring: $UBOOT/common/spl/spl_nand.c - CONFIG_SYS_NAND_SPL_KERNEL_OFFS - CONFIG_CMD_SPL_WRITE_SIZE - CONFIG_CMD_SPL_NAND_OFS May be I put them in wrong place in include/configs/ti814x.h but these are required for NAND SPL boot. Please confirm ? > > @@ -242,5 +283,32 @@ > > #define CONFIG_PHY_ADDR 1 > > #define CONFIG_PHY_ET1011C > > #define CONFIG_PHY_ET1011C_TX_CLK_FIX > > +#define CONFIG_NAND > > +/* NAND support */ > > +#ifdef CONFIG_NAND > > +#define CONFIG_MTD_NAND_OMAP_BCH > > +#define CONFIG_CMD_NAND > > +#define CONFIG_CMD_MTDPARTS > > +#define MTDIDS_DEFAULT "nand0=omap2-nand.0" > > +#define MTDPARTS_DEFAULT "mtdparts=omap2- > nand.0:128k(SPL)," \ > > + "128k(u-boot-spl)," \ > > + "2M(u-boot-main)," \ > > + "128k(u-boot-env),4M(kernel),- > (rootfs)" > > Lets get the partition tables right, we've still got 4 locations where > ROM checks for something, so lets use those for SPL, then U-Boot, then > U-Boot Env (redundant as well, please), and a block saved off for device > tree/SPL OS "args" support, then kernel, rootfs. > I think TI814x ROM use different NAND layout than AM33xx devices. I used following NAND layout given in link below as reference: http://processors.wiki.ti.com/index.php/TI81XX_PSP_UBOOT_User_Guide#EVM_Switch_Settings These devices belong to omap3 family, but now are merged with am33xx. > > +#define CONFIG_NAND_OMAP_GPMC > > +#define GPMC_NAND_ECC_LP_x16_LAYOUT 1 > > +#define NAND_BASE (0x08000000) > > Don't need NAND_BASE. Ok thanks. - Also removing GPMC_NAND_ECC_LP_x16_LAYOUT as predefined nand_ecclayouts in omap_gpmc.h are not used anymore. - Trying to remove dependency on CONFIG_NAND_OMAP_GPMC as except legacy devices all new platform support ELM based ECC schemes. > > > +#define CONFIG_SYS_NAND_BASE (0x08000000) /* physical > address */ > > + /* to access nand at> */ > > + /* CS0 */ > > +#define CONFIG_SYS_MAX_NAND_DEVICE 1 > > +/* Max number of NAND devices */ > > +#define CONFIG_SYS_NAND_BOOT > > +#if !defined(CONFIG_SPI_BOOT) > > +#undef CONFIG_ENV_IS_NOWHERE > > +#define CONFIG_ENV_IS_IN_NAND > > +#define CONFIG_ENV_OFFSET 0x260000 /* environment > starts here */ > > +#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ > > +#endif > > +#endif > > And we don't support SPI boot or anything here, so lets just always do > env on NAND until we have support for other things as well. Thanks! > Ok. yes I'll remove them.. with regards, pekon ^ permalink raw reply [flat|nested] 5+ messages in thread
* [U-Boot] [PATCH v1 2/2] ti814x_evm: enable support for NAND 2013-09-16 9:51 [U-Boot] [PATCH v1 2/2] ti814x_evm: enable support for NAND Gupta, Pekon @ 2013-09-19 18:09 ` Tom Rini 0 siblings, 0 replies; 5+ messages in thread From: Tom Rini @ 2013-09-19 18:09 UTC (permalink / raw) To: u-boot -----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 On 09/16/2013 05:51 AM, Gupta, Pekon wrote: >> On Tue, Aug 06, 2013 at 01:45:08PM +0530, Pekon Gupta wrote: >> >>> ti814x_evm has on-board socket for using Micron (MT29Fxx) family of >>> NAND devices to GPMC interface. This patch >>> - adds NAND related pin-mux configuration for same >>> - adds #defines for NAND partitions to TI814x configs >>> - enables support for NAND in TI814x configs > [snip] >> >>> @@ -186,6 +193,14 @@ >>> #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ >>> #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1 >>> #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img" >>> + >>> +#ifdef CONFIG_SPL_OS_BOOT >>> +/* nand */ >>> +#define CONFIG_CMD_SPL_NAND_OFS 0x000000 /* >> end of u-boot */ >>> +#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000 >>> +#define CONFIG_CMD_SPL_WRITE_SIZE 0x1000 >>> +#endif >> >> Since you aren't adding the SD/MMC defines as well, nor setting >> SPL_OS_BOOT, lets drop these. >> > Sorry but dint get your feedback. > Following are used in SPL boot for loading env and kernel in falcon mode. > Referring: $UBOOT/common/spl/spl_nand.c > - CONFIG_SYS_NAND_SPL_KERNEL_OFFS > - CONFIG_CMD_SPL_WRITE_SIZE > - CONFIG_CMD_SPL_NAND_OFS > May be I put them in wrong place in include/configs/ti814x.h but these > are required for NAND SPL boot. Please confirm ? They are required for falcon mode yes, but only for falcon mode. And you don't set CONFIG_SPL_OS_BOOT to turn it on :) >>> @@ -242,5 +283,32 @@ >>> #define CONFIG_PHY_ADDR 1 >>> #define CONFIG_PHY_ET1011C >>> #define CONFIG_PHY_ET1011C_TX_CLK_FIX >>> +#define CONFIG_NAND >>> +/* NAND support */ >>> +#ifdef CONFIG_NAND >>> +#define CONFIG_MTD_NAND_OMAP_BCH >>> +#define CONFIG_CMD_NAND >>> +#define CONFIG_CMD_MTDPARTS >>> +#define MTDIDS_DEFAULT "nand0=omap2-nand.0" >>> +#define MTDPARTS_DEFAULT "mtdparts=omap2- >> nand.0:128k(SPL)," \ >>> + "128k(u-boot-spl)," \ >>> + "2M(u-boot-main)," \ >>> + "128k(u-boot-env),4M(kernel),- >> (rootfs)" >> >> Lets get the partition tables right, we've still got 4 locations where >> ROM checks for something, so lets use those for SPL, then U-Boot, then >> U-Boot Env (redundant as well, please), and a block saved off for device >> tree/SPL OS "args" support, then kernel, rootfs. >> > I think TI814x ROM use different NAND layout than AM33xx devices. > I used following NAND layout given in link below as reference: > http://processors.wiki.ti.com/index.php/TI81XX_PSP_UBOOT_User_Guide#EVM_Switch_Settings > These devices belong to omap3 family, but now are merged with am33xx. Yeah. OMAP3 and AM33xx (and am43xx) share the same redundancy locations. The PSP layout here is sub-optimal is all. - -- Tom -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) Comment: Using GnuPG with Thunderbird - http://www.enigmail.net/ iQIcBAEBAgAGBQJSOz3pAAoJENk4IS6UOR1W5HoP/j+oIaehk8WgJ0NJUQhg2u5Q TSCiITuEhr8pmGXjnrxYhsHloq2icK4iCdZ45tLNQbDkmFZne7q+5uChOHSZZiwI DGGundQKkf84ECUq2jGXMtIVKQr0Ba8yb25l3rTqy+hfaqbfcg8ZNXxCQ4wKkCqj 4Z8n0gJodzxncPG48gCW1kbzyqg2ZnEwqgLuDuqu6DAhYOEu/lpouakGVRLOpe9r mRdSfu+edUf44zbQ6PEmHD67u1jCNwvc7RQ3Gk9cHM9Ma+9OsN8LULD5FvRovFmO KYYDW/v2tC23LBAjzMnfBzCMpo7Wd6FJVT7JMkT3SKWVdDkDRIG+PDUcZoMS0XcE UMbMnf2VHjFs9ccAL0dKZs4DrR0ECzoubCK+KdtecMFplOo/JDD03O6uMTMv+t32 uwa9UcJYK3w9pPVnng/zAvKTU4lmMkIh2sIM9kquJwoT2aJ3NFa0jjHZLkDNw7BD rie3ZQ5kH91ZMdvDuExkNnSt0pDuM95/ro4OeakRuWdKCure9Kszd+Nattrnc6wU 5gmWQ1rBELgg1ATSmWJEnyo7cORnCKSztyUZG/GTxlkKE+ScU/7wsm/ClAtDN7Of NZwDowfdU5TFdU1vFSk9aP2ShSldzG51GUm4IcwmXP98R0DDtVMiTC+CMxpgLRDh dmTwOEoBt8Vr4w7lPgDi =IPQo -----END PGP SIGNATURE----- ^ permalink raw reply [flat|nested] 5+ messages in thread
* [U-Boot] [PATCH v1 1/2] am33xx: enable GPMC clocks for TI814x @ 2013-08-06 9:40 Pekon Gupta 2013-08-06 9:40 ` [U-Boot] [PATCH v1 2/2] ti814x_evm: enable support for NAND Pekon Gupta 0 siblings, 1 reply; 5+ messages in thread From: Pekon Gupta @ 2013-08-06 9:40 UTC (permalink / raw) To: u-boot GPMC registers need to be pre-initialized for NAND and NOR probe. So this patch brings out GPMC H/W engine from IDLE state. Signed-off-by: Pekon Gupta <pekon@ti.com> --- arch/arm/cpu/armv7/am33xx/clock_ti814x.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/cpu/armv7/am33xx/clock_ti814x.c b/arch/arm/cpu/armv7/am33xx/clock_ti814x.c index 658772b..149590e 100644 --- a/arch/arm/cpu/armv7/am33xx/clock_ti814x.c +++ b/arch/arm/cpu/armv7/am33xx/clock_ti814x.c @@ -269,6 +269,11 @@ static void enable_per_clocks(void) while (readl(&cmalwon->uart0clkctrl) != PRCM_MOD_EN) ; + /* GPMC */ + writel(PRCM_MOD_EN, &cmalwon->gpmcclkctrl); + while (readl(&cmalwon->gpmcclkctrl) != PRCM_MOD_EN) + ; + /* HSMMC1 */ writel(PRCM_MOD_EN, &cmalwon->mmchs1clkctrl); while (readl(&cmalwon->mmchs1clkctrl) != PRCM_MOD_EN) -- 1.8.1 ^ permalink raw reply related [flat|nested] 5+ messages in thread
* [U-Boot] [PATCH v1 2/2] ti814x_evm: enable support for NAND 2013-08-06 9:40 [U-Boot] [PATCH v1 1/2] am33xx: enable GPMC clocks for TI814x Pekon Gupta @ 2013-08-06 9:40 ` Pekon Gupta 0 siblings, 0 replies; 5+ messages in thread From: Pekon Gupta @ 2013-08-06 9:40 UTC (permalink / raw) To: u-boot ti814x_evm has on-board socket for using Micron (MT29Fxx) family of NAND devices to GPMC interface. This patch - adds NAND related pin-mux configuration for same - adds #defines for NAND partitions to TI814x configs - enables support for NAND in TI814x configs - Signed-off-by: Pekon Gupta <pekon@ti.com> --- board/ti/ti814x/evm.c | 4 +++ board/ti/ti814x/evm.h | 1 + board/ti/ti814x/mux.c | 59 +++++++++++++++++++++++++++++++++++++ include/configs/ti814x_evm.h | 70 +++++++++++++++++++++++++++++++++++++++++++- 4 files changed, 133 insertions(+), 1 deletion(-) diff --git a/board/ti/ti814x/evm.c b/board/ti/ti814x/evm.c index 17fba5a..165cdf4 100644 --- a/board/ti/ti814x/evm.c +++ b/board/ti/ti814x/evm.c @@ -140,6 +140,9 @@ void s_init(void) /* Set Ethernet pins */ enable_enet_pin_mux(); + /* Set NAND pins */ + enable_nand_pin_mux(); + /* Enable UART */ uart_enable(); @@ -162,6 +165,7 @@ void s_init(void) int board_init(void) { gd->bd->bi_boot_params = PHYS_DRAM_1 + 0x100; + gpmc_init(); return 0; } diff --git a/board/ti/ti814x/evm.h b/board/ti/ti814x/evm.h index 6aebec6..113ccc0 100644 --- a/board/ti/ti814x/evm.h +++ b/board/ti/ti814x/evm.h @@ -4,5 +4,6 @@ void enable_uart0_pin_mux(void); void enable_mmc1_pin_mux(void); void enable_enet_pin_mux(void); +void enable_nand_pin_mux(void); #endif /* _EVM_H */ diff --git a/board/ti/ti814x/mux.c b/board/ti/ti814x/mux.c index fd9f364..5410b1d 100644 --- a/board/ti/ti814x/mux.c +++ b/board/ti/ti814x/mux.c @@ -70,6 +70,60 @@ static struct module_pin_mux enet_pin_mux[] = { {OFFSET(pincntl258), MODE(0x01)}, /* EMAC[0]_MTXEN */ }; +static struct module_pin_mux nand_pin_mux[] = { + {OFFSET(pincntl89) , MODE(1) | PULLUDDIS}, /* GPMC_D0 */ + {OFFSET(pincntl90) , MODE(1) | PULLUDDIS}, /* GPMC_D1 */ + {OFFSET(pincntl91) , MODE(1) | PULLUDDIS}, /* GPMC_D2 */ + {OFFSET(pincntl92) , MODE(1) | PULLUDDIS}, /* GPMC_D3 */ + {OFFSET(pincntl93) , MODE(1) | PULLUDDIS}, /* GPMC_D4 */ + {OFFSET(pincntl94) , MODE(1) | PULLUDDIS}, /* GPMC_D5 */ + {OFFSET(pincntl95) , MODE(1) | PULLUDDIS}, /* GPMC_D6 */ + {OFFSET(pincntl96) , MODE(1) | PULLUDDIS}, /* GPMC_D7 */ + {OFFSET(pincntl97) , MODE(1) | PULLUDDIS}, /* GPMC_D8 */ + {OFFSET(pincntl98) , MODE(1) | PULLUDDIS}, /* GPMC_D9 */ + {OFFSET(pincntl99) , MODE(1) | PULLUDDIS}, /* GPMC_D10 */ + {OFFSET(pincntl100), MODE(1) | PULLUDDIS}, /* GPMC_D11 */ + {OFFSET(pincntl101), MODE(1) | PULLUDDIS}, /* GPMC_D12 */ + {OFFSET(pincntl102), MODE(1) | PULLUDDIS}, /* GPMC_D13 */ + {OFFSET(pincntl103), MODE(1) | PULLUDDIS}, /* GPMC_D14 */ + {OFFSET(pincntl104), MODE(1) | PULLUDDIS}, /* GPMC_D15 */ + {OFFSET(pincntl117), MODE(2) | PULLUP_EN}, /* GPMC_A1 */ + {OFFSET(pincntl118), MODE(2) | PULLUP_EN}, /* GPMC_A2 */ + {OFFSET(pincntl119), MODE(2) | PULLUP_EN}, /* GPMC_A3 */ + {OFFSET(pincntl120), MODE(2) | PULLUP_EN}, /* GPMC_A4 */ + {OFFSET(pincntl168), MODE(5) | PULLUP_EN}, /* GPMC_A5 */ + {OFFSET(pincntl169), MODE(5) | PULLUP_EN}, /* GPMC_A6 */ + {OFFSET(pincntl170), MODE(5) | PULLUP_EN}, /* GPMC_A7 */ + {OFFSET(pincntl171), MODE(5) | PULLUP_EN}, /* GPMC_A8 */ + {OFFSET(pincntl172), MODE(5) | PULLUP_EN}, /* GPMC_A9 */ + {OFFSET(pincntl173), MODE(5) | PULLUP_EN}, /* GPMC_A10 */ + {OFFSET(pincntl174), MODE(5) | PULLUP_EN}, /* GPMC_A11 */ + {OFFSET(pincntl175), MODE(5) | PULLUP_EN}, /* GPMC_A12 */ + {OFFSET(pincntl228), MODE(2) | PULLUP_EN}, /* GPMC_A13 */ + {OFFSET(pincntl229), MODE(2) | PULLUP_EN}, /* GPMC_A14 */ + {OFFSET(pincntl230), MODE(2) | PULLUP_EN}, /* GPMC_A15 */ + {OFFSET(pincntl105), MODE(1) | PULLUP_EN}, /* GPMC_A16 */ + {OFFSET(pincntl106), MODE(1) | PULLUP_EN}, /* GPMC_A17 */ + {OFFSET(pincntl107), MODE(1) | PULLUP_EN}, /* GPMC_A18 */ + {OFFSET(pincntl108), MODE(1) | PULLUP_EN}, /* GPMC_A19 */ + {OFFSET(pincntl109), MODE(1) | PULLUP_EN}, /* GPMC_A20 */ + {OFFSET(pincntl110), MODE(1) | PULLUP_EN}, /* GPMC_A21 */ + {OFFSET(pincntl111), MODE(1) | PULLUP_EN}, /* GPMC_A22 */ + {OFFSET(pincntl112), MODE(1) | PULLUP_EN}, /* GPMC_A23 */ + {OFFSET(pincntl113), MODE(2) | PULLUP_EN}, /* GPMC_A24 */ + {OFFSET(pincntl114), MODE(2) | PULLUP_EN}, /* GPMC_A25 */ + {OFFSET(pincntl115), MODE(2) | PULLUP_EN}, /* GPMC_A26 */ + {OFFSET(pincntl116), MODE(2) | PULLUP_EN}, /* GPMC_A27 */ + {OFFSET(pincntl122), MODE(1) | PULLUDEN}, /* GPMC_CS0 */ + {OFFSET(pincntl127), MODE(1)}, /* GPMC_CLK */ + {OFFSET(pincntl128), MODE(1)}, /* GPMC_ALE_ADV */ + {OFFSET(pincntl129), MODE(1) | PULLUDEN}, /* GPMC_OE_RE */ + {OFFSET(pincntl130), MODE(1) | PULLUP_EN}, /* GPMC_WEN */ + {OFFSET(pincntl131), MODE(1) | PULLUP_EN}, /* GPMC_BEN0 */ + {OFFSET(pincntl133), MODE(1) | PULLUDEN}, /* GPMC_WAIT0 */ + {0}, +}; + void enable_uart0_pin_mux(void) { configure_module_pin_mux(uart0_pin_mux); @@ -84,3 +138,8 @@ void enable_enet_pin_mux(void) { configure_module_pin_mux(enet_pin_mux); } + +void enable_nand_pin_mux(void) +{ + configure_module_pin_mux(nand_pin_mux); +} diff --git a/include/configs/ti814x_evm.h b/include/configs/ti814x_evm.h index eac5ad0..b6fafc7 100644 --- a/include/configs/ti814x_evm.h +++ b/include/configs/ti814x_evm.h @@ -18,7 +18,6 @@ #define CONFIG_TI81XX #define CONFIG_TI814X -#define CONFIG_SYS_NO_FLASH #define CONFIG_OMAP #include <asm/arch/omap.h> @@ -56,6 +55,7 @@ "fdtfile=\0" \ "console=ttyO0,115200n8\0" \ "optargs=\0" \ + "dfu_alt_info_nand=" DFU_ALT_INFO_NAND "\0" \ "mmcdev=0\0" \ "mmcroot=/dev/mmcblk0p2 ro\0" \ "mmcrootfstype=ext4 rootwait\0" \ @@ -134,6 +134,13 @@ #define CONFIG_DOS_PARTITION #define CONFIG_CMD_FAT #define CONFIG_CMD_EXT2 +#define CONFIG_DFU_NAND +#define DFU_ALT_INFO_NAND \ + "u-boot-spl part 0 1;" \ + "u-boot-main part 0 2;" \ + "env variables part 0 3;" \ + "kernel part 0 4;" \ + "rootfs part 0 5" /** * Physical Memory Map @@ -186,6 +193,14 @@ #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1 #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img" + +#ifdef CONFIG_SPL_OS_BOOT +/* nand */ +#define CONFIG_CMD_SPL_NAND_OFS 0x000000 /* end of u-boot */ +#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000 +#define CONFIG_CMD_SPL_WRITE_SIZE 0x1000 +#endif + #define CONFIG_SPL_MMC_SUPPORT #define CONFIG_SPL_FAT_SUPPORT @@ -200,6 +215,32 @@ #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" #define CONFIG_SPL_BOARD_INIT +#define CONFIG_SPL_NAND_AM33XX_BCH +#define CONFIG_SPL_NAND_SUPPORT +#define CONFIG_SPL_NAND_BASE +#define CONFIG_SPL_NAND_DRIVERS +#define CONFIG_SPL_NAND_ECC +#define CONFIG_SYS_NAND_5_ADDR_CYCLE +#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ + CONFIG_SYS_NAND_PAGE_SIZE) +#define CONFIG_SYS_NAND_PAGE_SIZE 2048 +#define CONFIG_SYS_NAND_OOBSIZE 64 +#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) +#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS +#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ + 10, 11, 12, 13, 14, 15, 16, 17, \ + 18, 19, 20, 21, 22, 23, 24, 25, \ + 26, 27, 28, 29, 30, 31, 32, 33, \ + 34, 35, 36, 37, 38, 39, 40, 41, \ + 42, 43, 44, 45, 46, 47, 48, 49, \ + 50, 51, 52, 53, 54, 55, 56, 57, } + +#define CONFIG_SYS_NAND_ECCSIZE 512 +#define CONFIG_SYS_NAND_ECCBYTES 14 + +#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE + +#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000 /* * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM @@ -242,5 +283,32 @@ #define CONFIG_PHY_ADDR 1 #define CONFIG_PHY_ET1011C #define CONFIG_PHY_ET1011C_TX_CLK_FIX +#define CONFIG_NAND +/* NAND support */ +#ifdef CONFIG_NAND +#define CONFIG_MTD_NAND_OMAP_BCH +#define CONFIG_CMD_NAND +#define CONFIG_CMD_MTDPARTS +#define MTDIDS_DEFAULT "nand0=omap2-nand.0" +#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:128k(SPL)," \ + "128k(u-boot-spl)," \ + "2M(u-boot-main)," \ + "128k(u-boot-env),4M(kernel),-(rootfs)" +#define CONFIG_NAND_OMAP_GPMC +#define GPMC_NAND_ECC_LP_x16_LAYOUT 1 +#define NAND_BASE (0x08000000) +#define CONFIG_SYS_NAND_BASE (0x08000000) /* physical address */ + /* to access nand at */ + /* CS0 */ +#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND + devices */ +#define CONFIG_SYS_NAND_BOOT +#if !defined(CONFIG_SPI_BOOT) +#undef CONFIG_ENV_IS_NOWHERE +#define CONFIG_ENV_IS_IN_NAND +#define CONFIG_ENV_OFFSET 0x260000 /* environment starts here */ +#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ +#endif +#endif #endif /* ! __CONFIG_TI814X_EVM_H */ -- 1.8.1 ^ permalink raw reply related [flat|nested] 5+ messages in thread
* [U-Boot] [PATCH v1 1/2] am33xx: enable GPMC clocks for TI814x @ 2013-08-06 8:15 Pekon Gupta 2013-08-06 8:15 ` [U-Boot] [PATCH v1 2/2] ti814x_evm: enable support for NAND Pekon Gupta 0 siblings, 1 reply; 5+ messages in thread From: Pekon Gupta @ 2013-08-06 8:15 UTC (permalink / raw) To: u-boot GPMC registers need to be pre-initialized for NAND and NOR probe. So this patch brings out GPMC H/W engine from IDLE state. Signed-off-by: Pekon Gupta <pekon@ti.com> --- arch/arm/cpu/armv7/am33xx/clock_ti814x.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/cpu/armv7/am33xx/clock_ti814x.c b/arch/arm/cpu/armv7/am33xx/clock_ti814x.c index 658772b..149590e 100644 --- a/arch/arm/cpu/armv7/am33xx/clock_ti814x.c +++ b/arch/arm/cpu/armv7/am33xx/clock_ti814x.c @@ -269,6 +269,11 @@ static void enable_per_clocks(void) while (readl(&cmalwon->uart0clkctrl) != PRCM_MOD_EN) ; + /* GPMC */ + writel(PRCM_MOD_EN, &cmalwon->gpmcclkctrl); + while (readl(&cmalwon->gpmcclkctrl) != PRCM_MOD_EN) + ; + /* HSMMC1 */ writel(PRCM_MOD_EN, &cmalwon->mmchs1clkctrl); while (readl(&cmalwon->mmchs1clkctrl) != PRCM_MOD_EN) -- 1.8.1 ^ permalink raw reply related [flat|nested] 5+ messages in thread
* [U-Boot] [PATCH v1 2/2] ti814x_evm: enable support for NAND 2013-08-06 8:15 [U-Boot] [PATCH v1 1/2] am33xx: enable GPMC clocks for TI814x Pekon Gupta @ 2013-08-06 8:15 ` Pekon Gupta 2013-08-28 15:03 ` Tom Rini 0 siblings, 1 reply; 5+ messages in thread From: Pekon Gupta @ 2013-08-06 8:15 UTC (permalink / raw) To: u-boot ti814x_evm has on-board socket for using Micron (MT29Fxx) family of NAND devices to GPMC interface. This patch - adds NAND related pin-mux configuration for same - adds #defines for NAND partitions to TI814x configs - enables support for NAND in TI814x configs - Signed-off-by: Pekon Gupta <pekon@ti.com> --- board/ti/ti814x/evm.c | 4 +++ board/ti/ti814x/evm.h | 1 + board/ti/ti814x/mux.c | 59 +++++++++++++++++++++++++++++++++++++ include/configs/ti814x_evm.h | 70 +++++++++++++++++++++++++++++++++++++++++++- 4 files changed, 133 insertions(+), 1 deletion(-) diff --git a/board/ti/ti814x/evm.c b/board/ti/ti814x/evm.c index 17fba5a..165cdf4 100644 --- a/board/ti/ti814x/evm.c +++ b/board/ti/ti814x/evm.c @@ -140,6 +140,9 @@ void s_init(void) /* Set Ethernet pins */ enable_enet_pin_mux(); + /* Set NAND pins */ + enable_nand_pin_mux(); + /* Enable UART */ uart_enable(); @@ -162,6 +165,7 @@ void s_init(void) int board_init(void) { gd->bd->bi_boot_params = PHYS_DRAM_1 + 0x100; + gpmc_init(); return 0; } diff --git a/board/ti/ti814x/evm.h b/board/ti/ti814x/evm.h index 6aebec6..113ccc0 100644 --- a/board/ti/ti814x/evm.h +++ b/board/ti/ti814x/evm.h @@ -4,5 +4,6 @@ void enable_uart0_pin_mux(void); void enable_mmc1_pin_mux(void); void enable_enet_pin_mux(void); +void enable_nand_pin_mux(void); #endif /* _EVM_H */ diff --git a/board/ti/ti814x/mux.c b/board/ti/ti814x/mux.c index fd9f364..5410b1d 100644 --- a/board/ti/ti814x/mux.c +++ b/board/ti/ti814x/mux.c @@ -70,6 +70,60 @@ static struct module_pin_mux enet_pin_mux[] = { {OFFSET(pincntl258), MODE(0x01)}, /* EMAC[0]_MTXEN */ }; +static struct module_pin_mux nand_pin_mux[] = { + {OFFSET(pincntl89) , MODE(1) | PULLUDDIS}, /* GPMC_D0 */ + {OFFSET(pincntl90) , MODE(1) | PULLUDDIS}, /* GPMC_D1 */ + {OFFSET(pincntl91) , MODE(1) | PULLUDDIS}, /* GPMC_D2 */ + {OFFSET(pincntl92) , MODE(1) | PULLUDDIS}, /* GPMC_D3 */ + {OFFSET(pincntl93) , MODE(1) | PULLUDDIS}, /* GPMC_D4 */ + {OFFSET(pincntl94) , MODE(1) | PULLUDDIS}, /* GPMC_D5 */ + {OFFSET(pincntl95) , MODE(1) | PULLUDDIS}, /* GPMC_D6 */ + {OFFSET(pincntl96) , MODE(1) | PULLUDDIS}, /* GPMC_D7 */ + {OFFSET(pincntl97) , MODE(1) | PULLUDDIS}, /* GPMC_D8 */ + {OFFSET(pincntl98) , MODE(1) | PULLUDDIS}, /* GPMC_D9 */ + {OFFSET(pincntl99) , MODE(1) | PULLUDDIS}, /* GPMC_D10 */ + {OFFSET(pincntl100), MODE(1) | PULLUDDIS}, /* GPMC_D11 */ + {OFFSET(pincntl101), MODE(1) | PULLUDDIS}, /* GPMC_D12 */ + {OFFSET(pincntl102), MODE(1) | PULLUDDIS}, /* GPMC_D13 */ + {OFFSET(pincntl103), MODE(1) | PULLUDDIS}, /* GPMC_D14 */ + {OFFSET(pincntl104), MODE(1) | PULLUDDIS}, /* GPMC_D15 */ + {OFFSET(pincntl117), MODE(2) | PULLUP_EN}, /* GPMC_A1 */ + {OFFSET(pincntl118), MODE(2) | PULLUP_EN}, /* GPMC_A2 */ + {OFFSET(pincntl119), MODE(2) | PULLUP_EN}, /* GPMC_A3 */ + {OFFSET(pincntl120), MODE(2) | PULLUP_EN}, /* GPMC_A4 */ + {OFFSET(pincntl168), MODE(5) | PULLUP_EN}, /* GPMC_A5 */ + {OFFSET(pincntl169), MODE(5) | PULLUP_EN}, /* GPMC_A6 */ + {OFFSET(pincntl170), MODE(5) | PULLUP_EN}, /* GPMC_A7 */ + {OFFSET(pincntl171), MODE(5) | PULLUP_EN}, /* GPMC_A8 */ + {OFFSET(pincntl172), MODE(5) | PULLUP_EN}, /* GPMC_A9 */ + {OFFSET(pincntl173), MODE(5) | PULLUP_EN}, /* GPMC_A10 */ + {OFFSET(pincntl174), MODE(5) | PULLUP_EN}, /* GPMC_A11 */ + {OFFSET(pincntl175), MODE(5) | PULLUP_EN}, /* GPMC_A12 */ + {OFFSET(pincntl228), MODE(2) | PULLUP_EN}, /* GPMC_A13 */ + {OFFSET(pincntl229), MODE(2) | PULLUP_EN}, /* GPMC_A14 */ + {OFFSET(pincntl230), MODE(2) | PULLUP_EN}, /* GPMC_A15 */ + {OFFSET(pincntl105), MODE(1) | PULLUP_EN}, /* GPMC_A16 */ + {OFFSET(pincntl106), MODE(1) | PULLUP_EN}, /* GPMC_A17 */ + {OFFSET(pincntl107), MODE(1) | PULLUP_EN}, /* GPMC_A18 */ + {OFFSET(pincntl108), MODE(1) | PULLUP_EN}, /* GPMC_A19 */ + {OFFSET(pincntl109), MODE(1) | PULLUP_EN}, /* GPMC_A20 */ + {OFFSET(pincntl110), MODE(1) | PULLUP_EN}, /* GPMC_A21 */ + {OFFSET(pincntl111), MODE(1) | PULLUP_EN}, /* GPMC_A22 */ + {OFFSET(pincntl112), MODE(1) | PULLUP_EN}, /* GPMC_A23 */ + {OFFSET(pincntl113), MODE(2) | PULLUP_EN}, /* GPMC_A24 */ + {OFFSET(pincntl114), MODE(2) | PULLUP_EN}, /* GPMC_A25 */ + {OFFSET(pincntl115), MODE(2) | PULLUP_EN}, /* GPMC_A26 */ + {OFFSET(pincntl116), MODE(2) | PULLUP_EN}, /* GPMC_A27 */ + {OFFSET(pincntl122), MODE(1) | PULLUDEN}, /* GPMC_CS0 */ + {OFFSET(pincntl127), MODE(1)}, /* GPMC_CLK */ + {OFFSET(pincntl128), MODE(1)}, /* GPMC_ALE_ADV */ + {OFFSET(pincntl129), MODE(1) | PULLUDEN}, /* GPMC_OE_RE */ + {OFFSET(pincntl130), MODE(1) | PULLUP_EN}, /* GPMC_WEN */ + {OFFSET(pincntl131), MODE(1) | PULLUP_EN}, /* GPMC_BEN0 */ + {OFFSET(pincntl133), MODE(1) | PULLUDEN}, /* GPMC_WAIT0 */ + {0}, +}; + void enable_uart0_pin_mux(void) { configure_module_pin_mux(uart0_pin_mux); @@ -84,3 +138,8 @@ void enable_enet_pin_mux(void) { configure_module_pin_mux(enet_pin_mux); } + +void enable_nand_pin_mux(void) +{ + configure_module_pin_mux(nand_pin_mux); +} diff --git a/include/configs/ti814x_evm.h b/include/configs/ti814x_evm.h index eac5ad0..b6fafc7 100644 --- a/include/configs/ti814x_evm.h +++ b/include/configs/ti814x_evm.h @@ -18,7 +18,6 @@ #define CONFIG_TI81XX #define CONFIG_TI814X -#define CONFIG_SYS_NO_FLASH #define CONFIG_OMAP #include <asm/arch/omap.h> @@ -56,6 +55,7 @@ "fdtfile=\0" \ "console=ttyO0,115200n8\0" \ "optargs=\0" \ + "dfu_alt_info_nand=" DFU_ALT_INFO_NAND "\0" \ "mmcdev=0\0" \ "mmcroot=/dev/mmcblk0p2 ro\0" \ "mmcrootfstype=ext4 rootwait\0" \ @@ -134,6 +134,13 @@ #define CONFIG_DOS_PARTITION #define CONFIG_CMD_FAT #define CONFIG_CMD_EXT2 +#define CONFIG_DFU_NAND +#define DFU_ALT_INFO_NAND \ + "u-boot-spl part 0 1;" \ + "u-boot-main part 0 2;" \ + "env variables part 0 3;" \ + "kernel part 0 4;" \ + "rootfs part 0 5" /** * Physical Memory Map @@ -186,6 +193,14 @@ #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1 #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img" + +#ifdef CONFIG_SPL_OS_BOOT +/* nand */ +#define CONFIG_CMD_SPL_NAND_OFS 0x000000 /* end of u-boot */ +#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000 +#define CONFIG_CMD_SPL_WRITE_SIZE 0x1000 +#endif + #define CONFIG_SPL_MMC_SUPPORT #define CONFIG_SPL_FAT_SUPPORT @@ -200,6 +215,32 @@ #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" #define CONFIG_SPL_BOARD_INIT +#define CONFIG_SPL_NAND_AM33XX_BCH +#define CONFIG_SPL_NAND_SUPPORT +#define CONFIG_SPL_NAND_BASE +#define CONFIG_SPL_NAND_DRIVERS +#define CONFIG_SPL_NAND_ECC +#define CONFIG_SYS_NAND_5_ADDR_CYCLE +#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ + CONFIG_SYS_NAND_PAGE_SIZE) +#define CONFIG_SYS_NAND_PAGE_SIZE 2048 +#define CONFIG_SYS_NAND_OOBSIZE 64 +#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) +#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS +#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ + 10, 11, 12, 13, 14, 15, 16, 17, \ + 18, 19, 20, 21, 22, 23, 24, 25, \ + 26, 27, 28, 29, 30, 31, 32, 33, \ + 34, 35, 36, 37, 38, 39, 40, 41, \ + 42, 43, 44, 45, 46, 47, 48, 49, \ + 50, 51, 52, 53, 54, 55, 56, 57, } + +#define CONFIG_SYS_NAND_ECCSIZE 512 +#define CONFIG_SYS_NAND_ECCBYTES 14 + +#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE + +#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000 /* * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM @@ -242,5 +283,32 @@ #define CONFIG_PHY_ADDR 1 #define CONFIG_PHY_ET1011C #define CONFIG_PHY_ET1011C_TX_CLK_FIX +#define CONFIG_NAND +/* NAND support */ +#ifdef CONFIG_NAND +#define CONFIG_MTD_NAND_OMAP_BCH +#define CONFIG_CMD_NAND +#define CONFIG_CMD_MTDPARTS +#define MTDIDS_DEFAULT "nand0=omap2-nand.0" +#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:128k(SPL)," \ + "128k(u-boot-spl)," \ + "2M(u-boot-main)," \ + "128k(u-boot-env),4M(kernel),-(rootfs)" +#define CONFIG_NAND_OMAP_GPMC +#define GPMC_NAND_ECC_LP_x16_LAYOUT 1 +#define NAND_BASE (0x08000000) +#define CONFIG_SYS_NAND_BASE (0x08000000) /* physical address */ + /* to access nand at */ + /* CS0 */ +#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND + devices */ +#define CONFIG_SYS_NAND_BOOT +#if !defined(CONFIG_SPI_BOOT) +#undef CONFIG_ENV_IS_NOWHERE +#define CONFIG_ENV_IS_IN_NAND +#define CONFIG_ENV_OFFSET 0x260000 /* environment starts here */ +#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ +#endif +#endif #endif /* ! __CONFIG_TI814X_EVM_H */ -- 1.8.1 ^ permalink raw reply related [flat|nested] 5+ messages in thread
* [U-Boot] [PATCH v1 2/2] ti814x_evm: enable support for NAND 2013-08-06 8:15 ` [U-Boot] [PATCH v1 2/2] ti814x_evm: enable support for NAND Pekon Gupta @ 2013-08-28 15:03 ` Tom Rini 0 siblings, 0 replies; 5+ messages in thread From: Tom Rini @ 2013-08-28 15:03 UTC (permalink / raw) To: u-boot On Tue, Aug 06, 2013 at 01:45:08PM +0530, Pekon Gupta wrote: > ti814x_evm has on-board socket for using Micron (MT29Fxx) family of > NAND devices to GPMC interface. This patch > - adds NAND related pin-mux configuration for same > - adds #defines for NAND partitions to TI814x configs > - enables support for NAND in TI814x configs [snip] > @@ -56,6 +55,7 @@ > "fdtfile=\0" \ > "console=ttyO0,115200n8\0" \ > "optargs=\0" \ > + "dfu_alt_info_nand=" DFU_ALT_INFO_NAND "\0" \ > "mmcdev=0\0" \ > "mmcroot=/dev/mmcblk0p2 ro\0" \ > "mmcrootfstype=ext4 rootwait\0" \ > @@ -134,6 +134,13 @@ > #define CONFIG_DOS_PARTITION > #define CONFIG_CMD_FAT > #define CONFIG_CMD_EXT2 > +#define CONFIG_DFU_NAND > +#define DFU_ALT_INFO_NAND \ > + "u-boot-spl part 0 1;" \ > + "u-boot-main part 0 2;" \ > + "env variables part 0 3;" \ > + "kernel part 0 4;" \ > + "rootfs part 0 5" You're not bringing in USB here, so drop these. > @@ -186,6 +193,14 @@ > #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ > #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1 > #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img" > + > +#ifdef CONFIG_SPL_OS_BOOT > +/* nand */ > +#define CONFIG_CMD_SPL_NAND_OFS 0x000000 /* end of u-boot */ > +#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000 > +#define CONFIG_CMD_SPL_WRITE_SIZE 0x1000 > +#endif Since you aren't adding the SD/MMC defines as well, nor setting SPL_OS_BOOT, lets drop these. > @@ -242,5 +283,32 @@ > #define CONFIG_PHY_ADDR 1 > #define CONFIG_PHY_ET1011C > #define CONFIG_PHY_ET1011C_TX_CLK_FIX > +#define CONFIG_NAND > +/* NAND support */ > +#ifdef CONFIG_NAND > +#define CONFIG_MTD_NAND_OMAP_BCH > +#define CONFIG_CMD_NAND > +#define CONFIG_CMD_MTDPARTS > +#define MTDIDS_DEFAULT "nand0=omap2-nand.0" > +#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:128k(SPL)," \ > + "128k(u-boot-spl)," \ > + "2M(u-boot-main)," \ > + "128k(u-boot-env),4M(kernel),-(rootfs)" Lets get the partition tables right, we've still got 4 locations where ROM checks for something, so lets use those for SPL, then U-Boot, then U-Boot Env (redundant as well, please), and a block saved off for device tree/SPL OS "args" support, then kernel, rootfs. > +#define CONFIG_NAND_OMAP_GPMC > +#define GPMC_NAND_ECC_LP_x16_LAYOUT 1 > +#define NAND_BASE (0x08000000) Don't need NAND_BASE. > +#define CONFIG_SYS_NAND_BASE (0x08000000) /* physical address */ > + /* to access nand at */ > + /* CS0 */ > +#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND > + devices */ > +#define CONFIG_SYS_NAND_BOOT > +#if !defined(CONFIG_SPI_BOOT) > +#undef CONFIG_ENV_IS_NOWHERE > +#define CONFIG_ENV_IS_IN_NAND > +#define CONFIG_ENV_OFFSET 0x260000 /* environment starts here */ > +#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ > +#endif > +#endif And we don't support SPI boot or anything here, so lets just always do env on NAND until we have support for other things as well. Thanks! -- Tom -------------- next part -------------- A non-text attachment was scrubbed... Name: not available Type: application/pgp-signature Size: 836 bytes Desc: Digital signature URL: <http://lists.denx.de/pipermail/u-boot/attachments/20130828/74818dd9/attachment.pgp> ^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2013-09-19 18:09 UTC | newest] Thread overview: 5+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2013-09-16 9:51 [U-Boot] [PATCH v1 2/2] ti814x_evm: enable support for NAND Gupta, Pekon 2013-09-19 18:09 ` Tom Rini -- strict thread matches above, loose matches on Subject: below -- 2013-08-06 9:40 [U-Boot] [PATCH v1 1/2] am33xx: enable GPMC clocks for TI814x Pekon Gupta 2013-08-06 9:40 ` [U-Boot] [PATCH v1 2/2] ti814x_evm: enable support for NAND Pekon Gupta 2013-08-06 8:15 [U-Boot] [PATCH v1 1/2] am33xx: enable GPMC clocks for TI814x Pekon Gupta 2013-08-06 8:15 ` [U-Boot] [PATCH v1 2/2] ti814x_evm: enable support for NAND Pekon Gupta 2013-08-28 15:03 ` Tom Rini
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