[U-Boot] How do ARM platform initialize DDR?

[York Sun <yorksun@freescale.com>]

On 09/19/2013 02:39 PM, Wolfgang Denk wrote:
> Dear York Sun,
> 
> In message <523B67D2.2050107@freescale.com> you wrote:
>>
>> So for ARM platforms, the majority don't have the flexibility of using
>> different DIMMs and/or clocks?
> 
> The majority of ARM systems are embedded designs which never use any
> kind of DIMM, but raw soldered-on RAM chips.

That explains a lot.

> 
>> Does it make sense to share the Freescale DDR driver across ARM and
>> Powerpc? Or does it make more sense to selectively copy the mpc8xxx DDR
>> driver to Freescale ARM subfolder to start with. If the similarity
> 
> You are probably in a beter position to answer that than us - how many
> ARM systems are there around that use the same memory controller as
> the MPC8xxx?

Zero as far as I know. But this is changing and this is why I brought it
up. I don't want to maintain two set of drivers if not necessary.

> 
>> For those who is not familiar with, Freescale is extending products to
>> ARM cores. I am expecting peripherals stay relatively close, so many
>> driver can be reused.
> 
> Well, I'm not sure which exact products you might have in mind here,
> but from what we've seen so far with the i.MX2x (and mxs), i.MX3x,
> iMX5x and i.MX6 systems, there are commnon IP blocks like the FEC, but
> so far I haven't seen this with the memory controller.

I hope I am not revealing a secret. :)
It has been announced that new SoCs are coming. It is still too early.
But I am preparing software for it.

> 
> And I haven't seen any single FSL ARM board in our lab yet that was
> using any kind ot DIMM or such.
> 
Thanks for confirmation. I will let you know once I learn what the board
will look like (not very soon).

York