From mboxrd@z Thu Jan 1 00:00:00 1970 From: York Sun Date: Fri, 20 Sep 2013 12:03:03 -0700 Subject: [U-Boot] [PATCH] powerpc/c29xpcie: Getting DDR SPD image from 16-bit sub-address EEPROM In-Reply-To: <1377066389-17646-1-git-send-email-Po.Liu@freescale.com> References: <1377066389-17646-1-git-send-email-Po.Liu@freescale.com> Message-ID: <523C9BE7.6050501@freescale.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 08/20/2013 11:26 PM, Po Liu wrote: > Currently, there is only one EEPROM on c29xpcie board which isAT24C1024. > We program the SPD data at beginning of the AT24C1024.But the AT24C1024 > has a 16-bit sub-address mode. This patch is tomake it work when getting > SPD in a 16-bit sub-address EEPROM. > > Signed-off-by: Po Liu > --- > board/freescale/c29xpcie/ddr.c | 12 ++++++++++++ > 1 file changed, 12 insertions(+) > > diff --git a/board/freescale/c29xpcie/ddr.c b/board/freescale/c29xpcie/ddr.c > index 3337d6c..28f1bd2 100644 > --- a/board/freescale/c29xpcie/ddr.c > +++ b/board/freescale/c29xpcie/ddr.c > @@ -84,3 +84,15 @@ void fsl_ddr_board_options(memctl_options_t *popts, > popts->cs_local_opts[i].odt_wr_cfg = FSL_DDR_ODT_CS; > } > } > + > +void get_spd(generic_spd_eeprom_t *spd, u8 i2c_address) > +{ > + int ret = i2c_read(i2c_address, 0, 2, (uchar *)spd, > + sizeof(generic_spd_eeprom_t)); > + > + if (ret) { > + printf("DDR: failed to read SPD from address %u\n", > + i2c_address); > + memset(spd, 0, sizeof(generic_spd_eeprom_t)); > + } > +} > Please fix the compiling warning. You need to include i2c.h, per internal review. York