[U-Boot] U-boot PPC405EX with DDR2 DIMM

[U-Boot] U-boot PPC405EX with DDR2 DIMM

[Steve Miller]

Hello,

I have inherited a design using the PPC405EX that was based on the
Kilauea reference design.   One of the changes was Kilauea uses on-board
DDR2 DRAM ICs and this design uses DDR2 DIMMs.   The u-boot is working,
except only 256MB of RAM is available instead of the 1GIG that the
module supports.   This working 256MB matches the memory that the
Kilauea had.  In looking into this, the CONFIG_SPD_EEPROM was undefined,
as that was what was appropriate for the Kilauea.   I defined this but
got lots of compiler errors.  So I did the following:

 

1.        Updated the eldk to 5.4

2.       Downloaded the latest u-boot source code I could find.
(Version 2013)

 

I still get compiler errors.  The first error is in 40x_spd_sdram.c    I
do not believe it should be attempting to compile this as it appears to
be SPD setting for SDRAM modules and not DDR2 modules.  I added another
check to line 50 of 40x_spd_sdram.c to skip that file if it is a 405EX.
This of course, eliminated those compiler errors.

 

Next place is has trouble is 44x_spd_ddr2.c   In line 460 it cannot find
SDR0_SRST0_DMC for example.  Another example is line 821, it cannot find
SDR0_DDR0.   In searching the PPC405EX datasheet, I do not find that
these registers exist in this part.    I believe it is supposed to
compile this file, as the file has specific references to the 405EX.
However, I do not know what I am missing to get this to compile for that
processor. 

 

Questions:

 

1.        Has anyone compiled u-boot for the 405EX using a DIMM, aka an
SPD defined RAM?

2.       Is there something obvious that I need to place in the config
to get this to work?   I compared this config to another product that
uses a 460SX.  I did not see anything special that the 460SX was
configuring to make the system work with the SPD of the DIMM.  

 

Thanks for any pointers.

 

---- Steve

 

 

[U-Boot] U-boot PPC405EX with DDR2 DIMM

[Rommel Custodio]

Dear Steve Miller,

Steve Miller <stevem <at> tanisys.com> writes:
>

<snipped>

> 
> Questions:
> 
> 1.        Has anyone compiled u-boot for the 405EX using a DIMM, aka an
> SPD defined RAM?
> 
> 2.       Is there something obvious that I need to place in the config
> to get this to work?   I compared this config to another product that
> uses a 460SX.  I did not see anything special that the 460SX was
> configuring to make the system work with the SPD of the DIMM.  

I have not directly worked with the 405 (only 440 and 465).

FWIW, defining CONFIG_DDR_SPD is not enough in some cases. You would also need 
to adjust timing parameters and row/column bits for your specific DIMM so that 
the DDR controller can correctly access all of your memory.


All the best,
Rommel

[U-Boot] U-boot PPC405EX with DDR2 DIMM

[Stefan Roese]

Hi Steve,

On 18.09.2013 13:26, Steve Miller wrote:
> I have inherited a design using the PPC405EX that was based on the
> Kilauea reference design.   One of the changes was Kilauea uses on-board
> DDR2 DRAM ICs and this design uses DDR2 DIMMs.   The u-boot is working,
> except only 256MB of RAM is available instead of the 1GIG that the
> module supports.   This working 256MB matches the memory that the
> Kilauea had.  In looking into this, the CONFIG_SPD_EEPROM was undefined,
> as that was what was appropriate for the Kilauea.   I defined this but
> got lots of compiler errors.  So I did the following:
> 
>  
> 
> 1.        Updated the eldk to 5.4
> 
> 2.       Downloaded the latest u-boot source code I could find.
> (Version 2013)

Good. Using the latest version is always a "good thing" to do.

> I still get compiler errors.  The first error is in 40x_spd_sdram.c    I
> do not believe it should be attempting to compile this as it appears to
> be SPD setting for SDRAM modules and not DDR2 modules.  I added another
> check to line 50 of 40x_spd_sdram.c to skip that file if it is a 405EX.
> This of course, eliminated those compiler errors.

Yes, this file should not be used on 405ex. Its for the "older" 405
variants with SDRAM and not DDR2.

> Next place is has trouble is 44x_spd_ddr2.c   In line 460 it cannot find
> SDR0_SRST0_DMC for example.  Another example is line 821, it cannot find
> SDR0_DDR0.   In searching the PPC405EX datasheet, I do not find that
> these registers exist in this part.    I believe it is supposed to
> compile this file, as the file has specific references to the 405EX.
> However, I do not know what I am missing to get this to compile for that
> processor. 
> 
>  
> 
> Questions:
> 
>  
> 
> 1.        Has anyone compiled u-boot for the 405EX using a DIMM, aka an
> SPD defined RAM?

I don't remember one. Not 100% sure, since 4xx development is quite dead
since a few years.

> 2.       Is there something obvious that I need to place in the config
> to get this to work?   I compared this config to another product that
> uses a 460SX.  I did not see anything special that the 460SX was
> configuring to make the system work with the SPD of the DIMM.

IIRC, then 405EX uses the same DDR2 controller as for example 460EX
does. Most likely a different version of this IP core though. Perhaps
with some extensions missing because of 460EX supporting bigger address
spaces. So you should take the canyonlands defines as a reference:

#define CONFIG_SPD_EEPROM
#define SPD_EEPROM_ADDRESS	{0x50, 0x51}

You need to adjust the EEPROM addresses to your board of course. And its
very likely that you need to change/fix the 44x_spd_ddr2.c code to
really support the 405EX.

Best regards,
Stefan

--
DENX Software Engineering GmbH,      MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich,  Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: office at denx.de

[U-Boot] U-boot PPC405EX with DDR2 DIMM

[Steve Miller]

Just wanted to tell the group that I am abandoning using the SPD data on
PPC405EX.  As I stated earlier, I inherited this design from others.
As I dug deeper into the HW, I found that a X64 module was used on a
processor that only has a X32 wide bus.  Apparently, they could get
modules for less than 1/2 the DRAM cost as 50% of the memory is unused.
This is most likely why no one is currently using DIMMs on the 405EX.
There are no commercially available X32 DIMMs in DDR2.  

My thanks to  Stefan and others for their suggestions.    I believe this
design I am working on will be limited to only one DIMM type.
Therefore, I am just going to assign the parameters in the header file
for this board. 

---- Steve