From mboxrd@z Thu Jan  1 00:00:00 1970
From: Vipin Kumar <vipin.kumar@st.com>
Date: Thu, 26 Sep 2013 09:39:52 +0530
Subject: [U-Boot] [PATCH v2] drivers/net/designware - fix alignment of
	buffer descriptors
In-Reply-To: <1380122868-5306-1-git-send-email-abrodkin@synopsys.com>
References: <1380122868-5306-1-git-send-email-abrodkin@synopsys.com>
Message-ID: <5243B390.4010708@st.com>
List-Id: <u-boot.lists.denx.de>
MIME-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: 7bit
To: u-boot@lists.denx.de

On 9/25/2013 8:57 PM, Alexey Brodkin wrote:
> It's important that buffer descriptors are aligned in accordance to GMAC
> data bus width (32/64/128-bit). It's safe to align to 128-bit (16-bytes)
> for every bus width type.
>
> If buffer descriptor is improperly aligned GMAC discards lower bits of
> provided address and as a result reads from improper location that
> doesn't match expected fields.
>
> Commit ef76025a99247cdb8f927a2c9f15400678dfb599 "net: Multiple
> updates/enhancements to designware.c" introduced another structure
> member "link_printed" right before buffer descriptors while "padding"
> member was left untouched. This together with alignment of structure
> itself to 16-byte boundary forces buffer descriptoprs always to be
> 4-byte aligned that causes driver complete disfunction if GMAC bus width
> is 64 or 128-bit.
>

I have also faced this problem before. May be a better solution is to 
place all the struct and buffer declarations at the very start of 
dw_eth_dev structure (off-course with a comment that these should not be 
moved). It may avoid the problem in later modifications

Regards
Vipin