* [U-Boot] [PATCH 1/2] powerpc/usb:Define CONFIG_USB_MAX_CONTROLLER_COUNT for all 85xx socs
2013-09-12 11:05 [U-Boot] [PATCH 0/2]powerpc/usb:Intergrate multiple USB controller support Ramneek Mehresh
@ 2013-09-12 11:05 ` Ramneek Mehresh
2013-09-27 18:54 ` York Sun
2013-09-12 11:05 ` [U-Boot] [PATCH 2/2] powerpc/usb:Differentiate USB controller base address Ramneek Mehresh
1 sibling, 1 reply; 5+ messages in thread
From: Ramneek Mehresh @ 2013-09-12 11:05 UTC (permalink / raw)
To: u-boot
CONFIG_USB_MAX_CONTROLLER_COUNT macro recently defined for
initializing all USB controllers on a given platform. This
macro is defined for all 85xx socs
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
---
arch/powerpc/cpu/mpc8xxx/fdt.c | 6 ++++--
arch/powerpc/include/asm/config_mpc85xx.h | 24 ++++++++++++++++++++++++
2 files changed, 28 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/cpu/mpc8xxx/fdt.c b/arch/powerpc/cpu/mpc8xxx/fdt.c
index eb7cbbc..9273745 100644
--- a/arch/powerpc/cpu/mpc8xxx/fdt.c
+++ b/arch/powerpc/cpu/mpc8xxx/fdt.c
@@ -15,7 +15,9 @@
#include <phy.h>
#include <hwconfig.h>
-#define FSL_MAX_NUM_USB_CTRLS 2
+#ifndef CONFIG_USB_MAX_CONTROLLER_COUNT
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
+#endif
#if defined(CONFIG_MP) && (defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx))
static int ft_del_cpuhandle(void *blob, int cpuhandle)
@@ -128,7 +130,7 @@ void fdt_fixup_dr_usb(void *blob, bd_t *bd)
char str[5];
int i, j;
- for (i = 1; i <= FSL_MAX_NUM_USB_CTRLS; i++) {
+ for (i = 1; i <= CONFIG_USB_MAX_CONTROLLER_COUNT; i++) {
int mode_idx = -1, phy_idx = -1;
snprintf(str, 5, "%s%d", "usb", i);
if (hwconfig(str)) {
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h
index 15e44de..b395e1c 100644
--- a/arch/powerpc/include/asm/config_mpc85xx.h
+++ b/arch/powerpc/include/asm/config_mpc85xx.h
@@ -127,6 +127,7 @@
#define CONFIG_SYS_FSL_SEC_COMPAT 4
#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
#define CONFIG_NUM_DDR_CONTROLLERS 1
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#define CONFIG_SYS_FSL_IFC_BANK_COUNT 4
#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000
#define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.2"
@@ -146,6 +147,7 @@
#define CONFIG_TSECV2
#define CONFIG_FSL_PCIE_DISABLE_ASPM
#define CONFIG_SYS_FSL_SEC_COMPAT 2
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000
#define CONFIG_SYS_FSL_ERRATUM_ELBC_A001
#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
@@ -154,6 +156,7 @@
#elif defined(CONFIG_P1012)
#define CONFIG_MAX_CPUS 1
#define CONFIG_SYS_FSL_NUM_LAWS 12
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#define CONFIG_SYS_PPC_E500_DEBUG_TLB 2
#define CONFIG_TSECV2
#define CONFIG_FSL_PCIE_DISABLE_ASPM
@@ -169,6 +172,7 @@
#elif defined(CONFIG_P1013)
#define CONFIG_MAX_CPUS 1
#define CONFIG_SYS_FSL_NUM_LAWS 12
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#define CONFIG_SYS_PPC_E500_DEBUG_TLB 2
#define CONFIG_TSECV2
#define CONFIG_SYS_FSL_SEC_COMPAT 2
@@ -186,6 +190,7 @@
#define CONFIG_SYS_FSL_SEC_COMPAT 4
#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
#define CONFIG_NUM_DDR_CONTROLLERS 1
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000
#define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
#define CONFIG_SYS_FSL_ERRATUM_IFC_A002769
@@ -200,6 +205,7 @@
#define CONFIG_SYS_NUM_FMAN 1
#define CONFIG_SYS_NUM_FM1_DTSEC 2
#define CONFIG_NUM_DDR_CONTROLLERS 1
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#define CONFIG_SYS_QMAN_NUM_PORTALS 3
#define CONFIG_SYS_BMAN_NUM_PORTALS 3
#define CONFIG_SYS_FM_MURAM_SIZE 0x10000
@@ -216,6 +222,7 @@
#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000
#define CONFIG_SYS_FSL_ERRATUM_ELBC_A001
#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#elif defined(CONFIG_P1021)
#define CONFIG_MAX_CPUS 2
@@ -230,6 +237,7 @@
#define QE_MURAM_SIZE 0x6000UL
#define MAX_QE_RISC 1
#define QE_NUM_OF_SNUM 28
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#elif defined(CONFIG_P1022)
#define CONFIG_MAX_CPUS 2
@@ -237,6 +245,7 @@
#define CONFIG_SYS_PPC_E500_DEBUG_TLB 2
#define CONFIG_TSECV2
#define CONFIG_SYS_FSL_SEC_COMPAT 2
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000
#define CONFIG_SYS_FSL_ERRATUM_ELBC_A001
#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
@@ -249,6 +258,7 @@
#define CONFIG_SYS_NUM_FMAN 1
#define CONFIG_SYS_NUM_FM1_DTSEC 2
#define CONFIG_NUM_DDR_CONTROLLERS 1
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#define CONFIG_SYS_QMAN_NUM_PORTALS 3
#define CONFIG_SYS_BMAN_NUM_PORTALS 3
#define CONFIG_SYS_FM_MURAM_SIZE 0x10000
@@ -265,6 +275,7 @@
#define CONFIG_TSECV2
#define CONFIG_FSL_PCIE_DISABLE_ASPM
#define CONFIG_SYS_FSL_SEC_COMPAT 2
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000
#define CONFIG_SYS_FSL_ERRATUM_ELBC_A001
#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
@@ -273,6 +284,7 @@
#elif defined(CONFIG_P1025)
#define CONFIG_MAX_CPUS 2
#define CONFIG_SYS_FSL_NUM_LAWS 12
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#define CONFIG_SYS_PPC_E500_DEBUG_TLB 2
#define CONFIG_TSECV2
#define CONFIG_FSL_PCIE_DISABLE_ASPM
@@ -290,6 +302,7 @@
#define CONFIG_SYS_FSL_NUM_LAWS 12
#define CONFIG_SYS_PPC_E500_DEBUG_TLB 2
#define CONFIG_SYS_FSL_SEC_COMPAT 2
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000
#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
#define CONFIG_SYS_FSL_ERRATUM_ESDHC_A001
@@ -307,6 +320,7 @@
#define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM 5
#define CONFIG_SYS_FSL_RMU
#define CONFIG_SYS_FSL_SRIO_MSG_UNIT_NUM 2
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#elif defined(CONFIG_PPC_P2041) /* also supports P2040 */
#define CONFIG_SYS_FSL_QORIQ_CHASSIS1
@@ -319,6 +333,7 @@
#define CONFIG_SYS_NUM_FM1_DTSEC 5
#define CONFIG_SYS_NUM_FM1_10GEC 1
#define CONFIG_NUM_DDR_CONTROLLERS 1
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#define CONFIG_SYS_FM_MURAM_SIZE 0x28000
#define CONFIG_SYS_FSL_TBCLK_DIV 32
#define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.2"
@@ -361,6 +376,7 @@
#define CONFIG_SYS_CCSRBAR_DEFAULT 0xfe000000
#define CONFIG_SYS_FSL_USB1_PHY_ENABLE
#define CONFIG_SYS_FSL_USB2_PHY_ENABLE
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
#define CONFIG_SYS_FSL_ERRATUM_NMG_CPU_A011
@@ -394,6 +410,7 @@
#define CONFIG_SYS_NUM_FM1_10GEC 1
#define CONFIG_SYS_NUM_FM2_10GEC 1
#define CONFIG_NUM_DDR_CONTROLLERS 2
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#define CONFIG_SYS_FM_MURAM_SIZE 0x28000
#define CONFIG_SYS_FSL_TBCLK_DIV 16
#define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,p4080-pcie"
@@ -441,6 +458,7 @@
#define CONFIG_SYS_NUM_FM1_DTSEC 5
#define CONFIG_SYS_NUM_FM1_10GEC 1
#define CONFIG_NUM_DDR_CONTROLLERS 2
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#define CONFIG_SYS_FM_MURAM_SIZE 0x28000
#define CONFIG_SYS_FSL_TBCLK_DIV 32
#define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.2"
@@ -476,6 +494,7 @@
#define CONFIG_SYS_NUM_FM2_DTSEC 5
#define CONFIG_SYS_NUM_FM2_10GEC 1
#define CONFIG_NUM_DDR_CONTROLLERS 2
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#define CONFIG_SYS_FM_MURAM_SIZE 0x28000
#define CONFIG_SYS_FSL_TBCLK_DIV 16
#define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.4"
@@ -500,6 +519,7 @@
#define CONFIG_TSECV2
#define CONFIG_SYS_FSL_SEC_COMPAT 4
#define CONFIG_NUM_DDR_CONTROLLERS 1
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#define CONFIG_SYS_FSL_DSP_M2_RAM_ADDR 0xb0000000
#define CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT 0xff600000
#define CONFIG_SYS_FSL_IFC_BANK_COUNT 3
@@ -515,6 +535,7 @@
#define CONFIG_TSECV2
#define CONFIG_SYS_FSL_SEC_COMPAT 4
#define CONFIG_NUM_DDR_CONTROLLERS 2
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#define CONFIG_SYS_FSL_DSP_DDR_ADDR 0x40000000
#define CONFIG_SYS_FSL_DSP_M2_RAM_ADDR 0xb0000000
#define CONFIG_SYS_FSL_DSP_M3_RAM_ADDR 0xc0000000
@@ -542,6 +563,7 @@
#define CONFIG_SYS_NUM_FM2_DTSEC 8
#define CONFIG_SYS_NUM_FM2_10GEC 2
#define CONFIG_NUM_DDR_CONTROLLERS 3
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#else
#define CONFIG_MAX_CPUS 8
#define CONFIG_SYS_NUM_FM1_DTSEC 7
@@ -588,6 +610,7 @@
#define CONFIG_SYS_FSL_SRDS_2
#define CONFIG_SYS_FSL_SEC_COMPAT 4
#define CONFIG_SYS_NUM_FMAN 1
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_4_7
#define CONFIG_SYS_FSL_IFC_BANK_COUNT 4
#define CONFIG_SYS_FMAN_V3
@@ -632,6 +655,7 @@
#define CONFIG_SYS_FSL_SEC_COMPAT 4
#define CONFIG_SYS_NUM_FMAN 1
#define CONFIG_SYS_NUM_FM1_DTSEC 5
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#define CONFIG_NUM_DDR_CONTROLLERS 1
#define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_4_7
#define CONFIG_SYS_FSL_IFC_BANK_COUNT 4
--
1.7.11.7
^ permalink raw reply related [flat|nested] 5+ messages in thread* [U-Boot] [PATCH 2/2] powerpc/usb:Differentiate USB controller base address
2013-09-12 11:05 [U-Boot] [PATCH 0/2]powerpc/usb:Intergrate multiple USB controller support Ramneek Mehresh
2013-09-12 11:05 ` [U-Boot] [PATCH 1/2] powerpc/usb:Define CONFIG_USB_MAX_CONTROLLER_COUNT for all 85xx socs Ramneek Mehresh
@ 2013-09-12 11:05 ` Ramneek Mehresh
2013-10-17 17:18 ` York Sun
1 sibling, 1 reply; 5+ messages in thread
From: Ramneek Mehresh @ 2013-09-12 11:05 UTC (permalink / raw)
To: u-boot
Introduce different macros for storing addresses of multiple
USB controllers. This is required for successful initialization
and usage of multiple USB controllers inside u-boot
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
---
arch/powerpc/cpu/mpc83xx/cpu_init.c | 2 +-
arch/powerpc/include/asm/immap_512x.h | 6 +++---
arch/powerpc/include/asm/immap_83xx.h | 18 ++++++++++++------
arch/powerpc/include/asm/immap_85xx.h | 9 +++++----
drivers/usb/host/ehci-fsl.c | 15 +++++++++++++--
drivers/usb/host/ehci-mpc512x.c | 4 ++--
include/usb/ehci-fsl.h | 13 ++++++++++---
7 files changed, 46 insertions(+), 21 deletions(-)
diff --git a/arch/powerpc/cpu/mpc83xx/cpu_init.c b/arch/powerpc/cpu/mpc83xx/cpu_init.c
index d568f88..d9b6e47 100644
--- a/arch/powerpc/cpu/mpc83xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc83xx/cpu_init.c
@@ -315,7 +315,7 @@ void cpu_init_f (volatile immap_t * im)
#endif
#if defined(CONFIG_USB_EHCI_FSL) && defined(CONFIG_MPC831x)
uint32_t temp;
- struct usb_ehci *ehci = (struct usb_ehci *)CONFIG_SYS_FSL_USB_ADDR;
+ struct usb_ehci *ehci = (struct usb_ehci *)CONFIG_SYS_FSL_USB1_ADDR;
/* Configure interface. */
setbits_be32(&ehci->control, REFSEL_16MHZ | UTMI_PHY_EN);
diff --git a/arch/powerpc/include/asm/immap_512x.h b/arch/powerpc/include/asm/immap_512x.h
index 01c9eff..dc655aa 100644
--- a/arch/powerpc/include/asm/immap_512x.h
+++ b/arch/powerpc/include/asm/immap_512x.h
@@ -1255,9 +1255,9 @@ static inline u32 get_pata_base (void)
}
#endif /* __ASSEMBLY__ */
-#define CONFIG_SYS_MPC512x_USB_OFFSET 0x4000
-#define CONFIG_SYS_MPC512x_USB_ADDR \
- (CONFIG_SYS_IMMR + CONFIG_SYS_MPC512x_USB_OFFSET)
+#define CONFIG_SYS_MPC512x_USB1_OFFSET 0x4000
+#define CONFIG_SYS_MPC512x_USB1_ADDR \
+ (CONFIG_SYS_IMMR + CONFIG_SYS_MPC512x_USB1_OFFSET)
#define IIM_BASE_ADDR (CONFIG_SYS_IMMR + offsetof(immap_t, iim))
diff --git a/arch/powerpc/include/asm/immap_83xx.h b/arch/powerpc/include/asm/immap_83xx.h
index 57189c9..3c86ff6 100644
--- a/arch/powerpc/include/asm/immap_83xx.h
+++ b/arch/powerpc/include/asm/immap_83xx.h
@@ -764,9 +764,11 @@ typedef struct immap {
} immap_t;
#ifdef CONFIG_HAS_FSL_MPH_USB
-#define CONFIG_SYS_MPC83xx_USB_OFFSET 0x22000 /* use the MPH controller */
+#define CONFIG_SYS_MPC83xx_USB1_OFFSET 0x22000 /* use the MPH controller */
+#define CONFIG_SYS_MPC83xx_USB2_OFFSET 0
#else
-#define CONFIG_SYS_MPC83xx_USB_OFFSET 0x23000 /* use the DR controller */
+#define CONFIG_SYS_MPC83xx_USB1_OFFSET 0
+#define CONFIG_SYS_MPC83xx_USB2_OFFSET 0x23000 /* use the DR controller */
#endif
#elif defined(CONFIG_MPC8313)
@@ -1031,11 +1033,15 @@ typedef struct immap {
#define CONFIG_SYS_MPC83xx_ESDHC_ADDR \
(CONFIG_SYS_IMMR + CONFIG_SYS_MPC83xx_ESDHC_OFFSET)
-#ifndef CONFIG_SYS_MPC83xx_USB_OFFSET
-#define CONFIG_SYS_MPC83xx_USB_OFFSET 0x23000
+#ifndef CONFIG_SYS_MPC83xx_USB1_OFFSET
+#define CONFIG_SYS_MPC83xx_USB1_OFFSET 0x23000
+#endif
+#define CONFIG_SYS_MPC83xx_USB1_ADDR \
+ (CONFIG_SYS_IMMR + CONFIG_SYS_MPC83xx_USB1_OFFSET)
+#if defined(CONFIG_MPC834x)
+#define CONFIG_SYS_MPC83xx_USB2_ADDR \
+ (CONFIG_SYS_IMMR + CONFIG_SYS_MPC83xx_USB2_OFFSET)
#endif
-#define CONFIG_SYS_MPC83xx_USB_ADDR \
- (CONFIG_SYS_IMMR + CONFIG_SYS_MPC83xx_USB_OFFSET)
#define CONFIG_SYS_LBC_ADDR (&((immap_t *)CONFIG_SYS_IMMR)->im_lbc)
#define CONFIG_SYS_TSEC1_OFFSET 0x24000
diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h
index 3a10d77..147ce4f 100644
--- a/arch/powerpc/include/asm/immap_85xx.h
+++ b/arch/powerpc/include/asm/immap_85xx.h
@@ -2938,7 +2938,6 @@ struct ccsr_pman {
#endif
#define CONFIG_SYS_MPC85xx_USB1_OFFSET 0x210000
#define CONFIG_SYS_MPC85xx_USB2_OFFSET 0x211000
-#define CONFIG_SYS_MPC85xx_USB_OFFSET CONFIG_SYS_MPC85xx_USB1_OFFSET
#define CONFIG_SYS_MPC85xx_USB1_PHY_OFFSET 0x214000
#define CONFIG_SYS_MPC85xx_USB2_PHY_OFFSET 0x214100
#define CONFIG_SYS_MPC85xx_SATA1_OFFSET 0x220000
@@ -2991,7 +2990,7 @@ struct ccsr_pman {
#define CONFIG_SYS_MPC85xx_IFC_OFFSET 0x1e000
#define CONFIG_SYS_MPC85xx_L2_OFFSET 0x20000
#define CONFIG_SYS_MPC85xx_DMA_OFFSET 0x21000
-#define CONFIG_SYS_MPC85xx_USB_OFFSET 0x22000
+#define CONFIG_SYS_MPC85xx_USB1_OFFSET 0x22000
#define CONFIG_SYS_MPC85xx_USB2_OFFSET 0x23000
#ifdef CONFIG_TSECV2
#define CONFIG_SYS_TSEC1_OFFSET 0xB0000
@@ -3092,8 +3091,10 @@ struct ccsr_pman {
(CONFIG_SYS_IMMR + CONFIG_SYS_FSL_CORENET_SERDES_OFFSET)
#define CONFIG_SYS_FSL_CORENET_SERDES2_ADDR \
(CONFIG_SYS_IMMR + CONFIG_SYS_FSL_CORENET_SERDES2_OFFSET)
-#define CONFIG_SYS_MPC85xx_USB_ADDR \
- (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_USB_OFFSET)
+#define CONFIG_SYS_MPC85xx_USB1_ADDR \
+ (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_USB1_OFFSET)
+#define CONFIG_SYS_MPC85xx_USB2_ADDR \
+ (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_USB2_OFFSET)
#define CONFIG_SYS_MPC85xx_USB1_PHY_ADDR \
(CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_USB1_PHY_OFFSET)
#define CONFIG_SYS_MPC85xx_USB2_PHY_ADDR \
diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index 0ef6f23..11fc5c2 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -37,7 +37,7 @@ static int usb_phy_clk_valid(struct usb_ehci *ehci)
*/
int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
{
- struct usb_ehci *ehci;
+ struct usb_ehci *ehci = NULL;
const char *phy_type = NULL;
size_t len;
#ifdef CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
@@ -46,7 +46,18 @@ int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
usb_phy[0] = '\0';
#endif
- ehci = (struct usb_ehci *)CONFIG_SYS_FSL_USB_ADDR;
+ switch (index) {
+ case 0:
+ ehci = (struct usb_ehci *)CONFIG_SYS_FSL_USB1_ADDR;
+ break;
+ case 1:
+ ehci = (struct usb_ehci *)CONFIG_SYS_FSL_USB2_ADDR;
+ break;
+ default:
+ printf("ERROR: wrong controller index!!\n");
+ break;
+ };
+
*hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength);
*hcor = (struct ehci_hcor *)((uint32_t) *hccr +
HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
diff --git a/drivers/usb/host/ehci-mpc512x.c b/drivers/usb/host/ehci-mpc512x.c
index bb6e7ac..193b17f 100644
--- a/drivers/usb/host/ehci-mpc512x.c
+++ b/drivers/usb/host/ehci-mpc512x.c
@@ -37,7 +37,7 @@ int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
volatile struct usb_ehci *ehci;
/* Hook the memory mapped registers for EHCI-Controller */
- ehci = (struct usb_ehci *)CONFIG_SYS_FSL_USB_ADDR;
+ ehci = (struct usb_ehci *)CONFIG_SYS_FSL_USB1_ADDR;
*hccr = (struct ehci_hccr *)((uint32_t)&(ehci->caplength));
*hcor = (struct ehci_hcor *)((uint32_t) *hccr +
HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
@@ -81,7 +81,7 @@ int ehci_hcd_stop(int index)
int exit_status = 0;
/* Reset the USB controller */
- ehci = (struct usb_ehci *)CONFIG_SYS_FSL_USB_ADDR;
+ ehci = (struct usb_ehci *)CONFIG_SYS_FSL_USB1_ADDR;
exit_status = reset_usb_controller(ehci);
return exit_status;
diff --git a/include/usb/ehci-fsl.h b/include/usb/ehci-fsl.h
index 9e106fc..734305b 100644
--- a/include/usb/ehci-fsl.h
+++ b/include/usb/ehci-fsl.h
@@ -149,11 +149,18 @@
#define MPC83XX_SCCR_USB_DRCM_10 0x00200000
#if defined(CONFIG_MPC83xx)
-#define CONFIG_SYS_FSL_USB_ADDR CONFIG_SYS_MPC83xx_USB_ADDR
+#define CONFIG_SYS_FSL_USB1_ADDR CONFIG_SYS_MPC83xx_USB1_ADDR
+#if defined(CONFIG_MPC834x)
+#define CONFIG_SYS_FSL_USB2_ADDR CONFIG_SYS_MPC83xx_USB2_ADDR
+#else
+#define CONFIG_SYS_FSL_USB2_ADDR 0
+#endif
#elif defined(CONFIG_MPC85xx)
-#define CONFIG_SYS_FSL_USB_ADDR CONFIG_SYS_MPC85xx_USB_ADDR
+#define CONFIG_SYS_FSL_USB1_ADDR CONFIG_SYS_MPC85xx_USB1_ADDR
+#define CONFIG_SYS_FSL_USB2_ADDR CONFIG_SYS_MPC85xx_USB2_ADDR
#elif defined(CONFIG_MPC512X)
-#define CONFIG_SYS_FSL_USB_ADDR CONFIG_SYS_MPC512x_USB_ADDR
+#define CONFIG_SYS_FSL_USB1_ADDR CONFIG_SYS_MPC512x_USB1_ADDR
+#define CONFIG_SYS_FSL_USB2_ADDR 0
#endif
/*
--
1.7.11.7
^ permalink raw reply related [flat|nested] 5+ messages in thread